{"id":1633,"date":"2022-11-22T23:05:55","date_gmt":"2022-11-22T15:05:55","guid":{"rendered":"http:\/\/www.hellofpga.com\/?p=1633"},"modified":"2023-02-18T22:40:14","modified_gmt":"2023-02-18T14:40:14","slug":"lcd","status":"publish","type":"post","link":"http:\/\/www.hellofpga.com\/index.php\/2022\/11\/22\/lcd\/","title":{"rendered":"Tiny ZYNQ\u677f \u5de5\u7a0b\u4e8c\u5341\u4e8c \u57fa\u4e8ePL\u7684RGB888\u5c4f\u5e55\u8c03\u8bd5\uff08\u914d\u7f6e\u7531PS I2C\u5b8c\u6210\uff09"},"content":{"rendered":"\n<p>\u672c\u6587\u5bf9\u624b\u4e0a\u76844\u5bf8 RGB888\u5c4f\u7a0b\u5e8f\u8fdb\u884c\u8c03\u8bd5\uff0c\u4e3a\u4e86\u5feb\u901f\u9a8c\u8bc1\u5c4f\u5e55\u662f\u5426\u5de5\u4f5c\uff0c\u8fd9\u91cc\u5148\u7528PS\u7684\u786c\u4ef6I2C\u529f\u80fd\u5bf9\u5c4f\u5e55\u8fdb\u884c\u521d\u59cb\u5316\uff08\u4ee5\u540e\u4f1a\u7528PL\u91cd\u5199\u914d\u7f6e\u90e8\u5206\uff09<\/p>\n\n\n\n<p>\u5982\u9898\uff0c\u672c\u6b21\u7528\u7684\u5c4f\u5e55\u662f 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class=\"wp-block-heading\"><strong>\u521b\u5efaVivado\u5de5\u7a0b<\/strong><\/h2>\n\n\n\n<p> 1\uff09\u5177\u4f53\u6b65\u9aa4 \u65b0\u5efa\u4e00\u4e2aVIVADO \u5de5\u7a0b\uff0c\u6253\u5f00\u8f6f\u4ef6 \u9009\u4e2dCreate Project, \u5982\u4e0b\u56fe\u6240\u793a<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"230\" height=\"136\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/07\/Create-Project.png\" alt=\"\" class=\"wp-image-35\"\/><\/figure>\n\n\n\n<p>2\uff09\u70b9\u51fbNEXT \uff0c\u5728\u51fa\u73b0\u7684\u7b2c\u4e8c\u4e2a\u5bf9\u8bdd\u6846\u201cProject name\u201d\u4e2d\u8f93\u5165\u5de5\u7a0b\u540d\uff1b\u5728\u201cProject location\u201d\u4e2d\u9009\u62e9\u4fdd\u5b58\u8def\u5f84\uff1b\u52fe\u9009\u201cCreate project subdirectory\u201d\uff0c\u6700\u540e\u70b9\u51fb\u201cNext\u201d&nbsp;<strong>\u5907\u6ce8\uff0c\u6240\u6709\u7684\u8def\u5f84\u5747\u4e0d\u80fd\u51fa\u73b0\u4e2d\u6587\u540d\u79f0<\/strong><\/p>\n\n\n\n<p>3\uff09\u70b9\u51fb RTL PROJECT \u9009\u9879\uff0c\u70b9\u51fbNEXT<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"681\" height=\"466\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/07\/image.png\" alt=\"\" class=\"wp-image-40\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/07\/image.png 681w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/07\/image-300x205.png 300w\" sizes=\"auto, (max-width: 681px) 100vw, 681px\" \/><\/figure>\n\n\n\n<p>4\uff09 \u7b2c\u56db\u6b65Add Sources \u9009\u9879\u76f4\u63a5\u7559\u7a7a\uff0cNEXT<\/p>\n\n\n\n<p>5\uff09\u7b2c\u4e94\u6b65Add Constraints \u9009\u9879\u76f4\u63a5\u7559\u7a7a\uff0cNEXT<\/p>\n\n\n\n<p>6\uff09\u9009\u62e9\u82af\u7247\u578b\u53f7 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src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-2.png\" alt=\"\" class=\"wp-image-184\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-2.png 477w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-2-300x170.png 300w\" sizes=\"auto, (max-width: 477px) 100vw, 477px\" \/><\/figure>\n\n\n\n<p>3\uff09\u8f6f\u4ef6\u81ea\u52a8\u751f\u6210\u4e86\u4e00\u4e2a zynq\u7684block \u5982\u4e0b\u56fe\u6240\u793a\uff0c\u63a5\u4e0b\u6765\u8981\u505a\u4e00\u4e9b\u76f8\u5e94\u7684\u8bbe\u7f6e\uff0c\u53cc\u51fb\u4e0b\u56fe\u4e2d\u7684ZYNQ\u6838<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"505\" height=\"266\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-3.png\" alt=\"\" class=\"wp-image-186\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-3.png 505w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-3-300x158.png 300w\" sizes=\"auto, (max-width: 505px) 100vw, 505px\" \/><\/figure>\n\n\n\n<p>4\uff09\u4f9d\u6b21\u5728\u5f39\u7a97\u91cc\u627e\u5230DDR Configuration\u2192DDR Controller Configuration\u2192DDR3\uff0c\u5728Memory Part\u4e0b\u62c9\u83dc\u5355\u4e2d\u6839\u636e\u81ea\u5df1\u677f\u5b50\u4e0a\u7684DDR\u6765\u9009\u62e9\u76f8\u5e94\u7684DDR3\uff0c\u672c\u5b9e\u9a8c\u6240\u7528\u5230\u578b\u53f7\uff1aMT41K128M16JT 125\uff0c\u6570\u636e\u4f4d\u5bbd\u9009\u62e916bit \u6700\u540e\u70b9\u51fb\u201cOK\u201d,\u5982\u4e0b\u56fe\u6240\u793a\u3002<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"977\" height=\"493\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-5.png\" alt=\"\" class=\"wp-image-188\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-5.png 977w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-5-300x151.png 300w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-5-768x388.png 768w\" sizes=\"auto, (max-width: 767px) 89vw, (max-width: 1000px) 54vw, (max-width: 1071px) 543px, 580px\" \/><\/figure>\n\n\n\n<p>5)\u5728PS\u7684MIO\u914d\u7f6e\u9009\u9879\u7684GPIO\u680f\u91cc\uff0c\u589e\u52a0\u4e24\u8defEMIO\uff08\u56e0\u4e3a\u672c\u6b21\u9664\u4e86I2C\u53bb\u914d\u7f6e\u5c4f\u5e55\u5916\uff0c\u8fd8\u9700\u8981\u4e24\u8defIO\u5206\u522b\u53bb\u63a7\u5236RST\u4fe1\u53f7\u548cBL\u80cc\u5149\u4fe1\u53f7\uff09<\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"714\" height=\"553\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/11\/image-52.png\" alt=\"\" class=\"wp-image-1638\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/11\/image-52.png 714w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/11\/image-52-300x232.png 300w\" sizes=\"auto, (max-width: 714px) 100vw, 714px\" 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class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"552\" height=\"247\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/10\/image-43.png\" alt=\"\" class=\"wp-image-1062\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/10\/image-43.png 552w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/10\/image-43-300x134.png 300w\" sizes=\"auto, (max-width: 552px) 100vw, 552px\" \/><\/figure>\n\n\n\n<p>8\uff09\u5c06\u521a\u624d\u6dfb\u52a0EMIO GPIO \u5f15\u51fa \u53f3\u952eGPIO_0\u2014->Make External<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"471\" height=\"338\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/10\/image-44.png\" alt=\"\" class=\"wp-image-1063\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/10\/image-44.png 471w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/10\/image-44-300x215.png 300w\" sizes=\"auto, (max-width: 471px) 100vw, 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height=\"308\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/11\/image-55.png\" alt=\"\" class=\"wp-image-1642\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/11\/image-55.png 644w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/11\/image-55-300x143.png 300w\" sizes=\"auto, (max-width: 644px) 100vw, 644px\" \/><\/figure>\n\n\n\n<p>11\uff09source\u2192Design Source \uff0c\u53f3\u952e\u6211\u4eec\u521b\u5efa\u7684BLOCK\u5de5\u7a0b\uff0c\u70b9\u51fbcreate HDL wrapper\u5982\u4e0b\u56fe\u6240\u793a\u3002<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"446\" height=\"271\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-12.png\" alt=\"\" class=\"wp-image-195\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-12.png 446w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-12-300x182.png 300w\" sizes=\"auto, (max-width: 446px) 100vw, 446px\" \/><\/figure>\n\n\n\n<p>\u5728\u5f39\u51fa\u7684\u5bf9\u8bdd\u6846\u91cc\u4fdd\u6301\u9ed8\u8ba4<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"492\" height=\"281\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-13.png\" alt=\"\" class=\"wp-image-196\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-13.png 492w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-13-300x171.png 300w\" sizes=\"auto, (max-width: 492px) 100vw, 492px\" \/><\/figure>\n\n\n\n<p>\u8f6f\u4ef6\u81ea\u52a8\u4e3a\u6211\u4eec\u751f\u6210HDL\u6587\u4ef6<\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"348\" height=\"107\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/11\/image-56.png\" alt=\"\" class=\"wp-image-1643\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/11\/image-56.png 348w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/11\/image-56-300x92.png 300w\" sizes=\"auto, (max-width: 348px) 100vw, 348px\" \/><\/figure>\n\n\n\n<p><\/p>\n\n\n\n<h2 class=\"wp-block-heading\">\u521b\u5efa\u5de5\u7a0bPL\u7684 RGB\u7684VERILOG\u90e8\u5206<\/h2>\n\n\n\n<p>RGB\u7684\u5de5\u7a0b\u5176\u5b9e\u4e4b\u524d\u6709\u5199\u8fc7\uff0c<a href=\"http:\/\/www.hellofpga.com\/index.php\/2022\/10\/05\/1700\/\" data-type=\"URL\" data-id=\"http:\/\/www.hellofpga.com\/index.php\/2022\/10\/05\/1700\/\" target=\"_blank\" rel=\"noreferrer noopener\">Tiny ZYNQ\u677f \u5de5\u7a0b\u4e94\u00a0\u00a0\u57fa\u4e8eZYNQ PL\u8d44\u6e90\u7684HDMI\u529f\u80fd\u6f14\u793a<\/a><\/p>\n\n\n\n<p>\u8fd9\u91cc\u6211\u4eec\u628aHDMI\u5de5\u7a0b\u7684 RGB\u90e8\u5206\u642c\u8fc7\u6765\u5e76\u4f5c\u7b80\u5355\u4fee\u6539\u3002<\/p>\n\n\n\n<p>1)\u9996\u5148\u6211\u4eec\u5148\u7528\u9501\u76f8\u73af\u521b\u5efa\u4e00\u4e2a33M\u7684\u65f6\u949f\uff08\u4e3a\u4ec0\u4e48\u662f33M \uff0c\u56e0\u4e3a800X480\u7684\u5c4f\u5e55\u572860hz\u5de6\u53f3\u7684\u65f6\u949f\u5c31\u662f33M\uff09<\/p>\n\n\n\n<p>\u70b9\u51fbIP Catalog \u6253\u5f00\u6a21\u5757\u9009\u62e9\u5668\uff0c \u5728\u91cc\u9762\u7684\u641c\u7d22\u680f\u8f93\u5165 CLOCKING \uff0c\u7cfb\u7edf\u4f1a\u81ea\u52a8\u8df3\u51fa\u7b26\u5408\u7684 Clocking Wizard\u9009\u9879\uff0c\u53cc\u51fb\u5b83<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"791\" height=\"354\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/07\/image-3.png\" alt=\"\" class=\"wp-image-138\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/07\/image-3.png 791w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/07\/image-3-300x134.png 300w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/07\/image-3-768x344.png 768w\" sizes=\"auto, (max-width: 767px) 89vw, (max-width: 1000px) 54vw, (max-width: 1071px) 543px, 580px\" \/><\/figure>\n\n\n\n<p>2\uff09\u5728\u5f39\u51fa\u7684\u7a97\u53e3\u4e2d\u6211\u4eec\u5c06input Frequence \u8f93\u5165\u9891\u7387\u4fee\u6539\u4e3a\u677f\u5b50\u4e0a\u710a\u63a5\u768450M\u65f6\u949f\uff0c \u53f3\u8fb9\u6539\u4e3a\u5355\u7aef\u8f93\u5165<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"660\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/07\/image-11-1024x660.png\" alt=\"\" class=\"wp-image-139\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/07\/image-11-1024x660.png 1024w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/07\/image-11-300x193.png 300w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/07\/image-11-768x495.png 768w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/07\/image-11.png 1342w\" sizes=\"auto, (max-width: 767px) 89vw, (max-width: 1000px) 54vw, (max-width: 1071px) 543px, 580px\" \/><\/figure>\n\n\n\n<p>3\uff09\u5728output Clocks\u9009\u9879\u4e2d \u5c06clk_out1\u6539\u621033m<\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"500\" height=\"258\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/11\/image-57.png\" alt=\"\" class=\"wp-image-1644\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/11\/image-57.png 500w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/11\/image-57-300x155.png 300w\" sizes=\"auto, (max-width: 500px) 100vw, 500px\" \/><\/figure>\n\n\n\n<p>4\uff09\u5c06\u754c\u9762\u6258\u5230\u6700\u4e0b\u9762\uff0c\u56e0\u4e3a\u6211\u4eec\u8fd9\u91cc\u7684\u8981\u6c42\u5e76\u4e0d\u9ad8\uff0c\u6240\u4ee5\u628a\u65f6\u949f\u7684\u590d\u4f4dreset\uff0c\u548clocked\u9009\u9879\u53bb\u9664\uff0c\u6700\u540e\u70b9\u51fbok\u751f\u6210\u6a21\u5757<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"741\" height=\"149\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/07\/image-15.png\" alt=\"\" class=\"wp-image-141\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/07\/image-15.png 741w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/07\/image-15-300x60.png 300w\" sizes=\"auto, (max-width: 706px) 89vw, (max-width: 767px) 82vw, 740px\" \/><\/figure>\n\n\n\n<p>\u4e4b\u540e\u70b9\u9009OK\u5b8c\u6210\u521b\u5efa<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">\u589e\u52a0\u6211\u4eec\u7684VERILOG\u4ee3\u7801\u5185\u5bb9<\/h2>\n\n\n\n<p>1\uff09\u8fd9\u91cc\u521b\u5efa\u4e00\u4e2a\u663e\u793a\u6a21\u5757\u663e\u793a\u6a21\u5757\u8d1f\u8d23\u8f93\u51fa\u6807\u51c6\u7684RGB\u65f6\u5e8f\uff0c\u8fd9\u91cc\u5bf9HDMI\u5de5\u7a0b\u4e2d\u7684RGB\u90e8\u5206\u4f5c\u4e86\u4fee\u6539\uff0c\u8c03\u6574\u4e86480X800\u7684\u65f6\u5e8f\uff0c\u4ee5\u53ca\u589e\u52a0\u4e86\u591a\u79cd\u663e\u793a\u6548\u679c\u5207\u6362\u7684\u90e8\u5206\uff0c\u8ba9\u663e\u793a\u7ed3\u679c\u66f4\u4e3a\u4e30\u5bcc\uff0c\u5177\u4f53\u5982\u4e0b( color_bar.v)<\/p>\n\n\n\n<pre class=\"wp-block-preformatted\">module COLOR_BAR(\r\n\tinput                 clk,           \/\/pixel clock\r\n\tinput                 rst,           \/\/reset signal high active\r\n\toutput                hs,            \/\/horizontal synchronization\r\n\toutput                vs,            \/\/vertical synchronization\r\n\toutput                de,            \/\/video valid\r\n\toutput[7:0]           rgb_r,         \/\/video red data\r\n\toutput[7:0]           rgb_g,         \/\/video green data\r\n\toutput[7:0]           rgb_b          \/\/video blue data\r\n);\r\n \r\n`define VIDEO_480_800\r\n\/\/800x480 33Mhz\r\n`ifdef  VIDEO_480_800\r\nparameter H_ACTIVE = 16'd480; \r\nparameter H_FP = 16'd1;      \r\nparameter H_SYNC = 16'd3;   \r\nparameter H_BP = 16'd160;      \r\nparameter V_ACTIVE = 16'd800; \r\nparameter V_FP  = 16'd40;     \r\nparameter V_SYNC  = 16'd128;    \r\nparameter V_BP  = 16'd88;    \r\nparameter HS_POL = 1'b0;\r\nparameter VS_POL = 1'b0;\r\n`endif\r\n\r\n\r\nparameter H_TOTAL = H_ACTIVE + H_FP + H_SYNC + H_BP;\/\/horizontal total time (pixels)\r\nparameter V_TOTAL = V_ACTIVE + V_FP + V_SYNC + V_BP;\/\/vertical total time (lines)\r\n\/\/define the RGB values for 8 colors\r\nparameter WHITE_R       = 8'hff;\r\nparameter WHITE_G       = 8'hff;\r\nparameter WHITE_B       = 8'hff;\r\nparameter YELLOW_R      = 8'hff;\r\nparameter YELLOW_G      = 8'hff;\r\nparameter YELLOW_B      = 8'h00;                                \r\nparameter CYAN_R        = 8'h00;\r\nparameter CYAN_G        = 8'hff;\r\nparameter CYAN_B        = 8'hff;                                \r\nparameter GREEN_R       = 8'h00;\r\nparameter GREEN_G       = 8'hff;\r\nparameter GREEN_B       = 8'h00;\r\nparameter MAGENTA_R     = 8'hff;\r\nparameter MAGENTA_G     = 8'h00;\r\nparameter MAGENTA_B     = 8'hff;\r\nparameter RED_R         = 8'hff;\r\nparameter RED_G         = 8'h00;\r\nparameter RED_B         = 8'h00;\r\nparameter BLUE_R        = 8'h00;\r\nparameter BLUE_G        = 8'h00;\r\nparameter BLUE_B        = 8'hff;\r\nparameter BLACK_R       = 8'h00;\r\nparameter BLACK_G       = 8'h00;\r\nparameter BLACK_B       = 8'h00;\r\nreg hs_reg;                      \/\/horizontal sync register\r\nreg vs_reg;                      \/\/vertical sync register\r\nreg hs_reg_d0;                   \/\/delay 1 clock of 'hs_reg'\r\nreg vs_reg_d0;                   \/\/delay 1 clock of 'vs_reg'\r\nreg[11:0] h_cnt;                 \/\/horizontal counter\r\nreg[11:0] v_cnt;                 \/\/vertical counter\r\nreg[11:0] active_x;              \/\/video x position \r\nreg[11:0] active_y;              \/\/video y position \r\nreg[7:0] rgb_r_reg;              \/\/video red data register\r\nreg[7:0] rgb_g_reg;              \/\/video green data register\r\nreg[7:0] rgb_b_reg;              \/\/video blue data register\r\nreg h_active;                    \/\/horizontal video active\r\nreg v_active;                    \/\/vertical video active\r\nwire video_active;               \/\/video active(horizontal active and vertical active)\r\nreg video_active_d0;             \/\/delay 1 clock of video_active\r\nassign hs = hs_reg_d0;\r\nassign vs = vs_reg_d0;\r\nassign video_active = h_active &amp; v_active;\r\nassign de = video_active_d0;\r\nassign rgb_r = rgb_r_reg;\r\nassign rgb_g = rgb_g_reg;\r\nassign rgb_b = rgb_b_reg;\r\nalways@(posedge clk or posedge rst)\r\nbegin\r\n\tif(rst == 1'b1)\r\n\t\tbegin\r\n\t\t\ths_reg_d0 &lt;= 1'b0;\r\n\t\t\tvs_reg_d0 &lt;= 1'b0;\r\n\t\t\tvideo_active_d0 &lt;= 1'b0;\r\n\t\tend\r\n\telse\r\n\t\tbegin\r\n\t\t\ths_reg_d0 &lt;= hs_reg;\r\n\t\t\tvs_reg_d0 &lt;= vs_reg;\r\n\t\t\tvideo_active_d0 &lt;= video_active;\r\n\t\tend\r\nend\r\n \r\nalways@(posedge clk or posedge rst)\r\nbegin\r\n\tif(rst == 1'b1)\r\n\t\th_cnt &lt;= 12'd0;\r\n\telse if(h_cnt == H_TOTAL - 1)\/\/horizontal counter maximum value\r\n\t\th_cnt &lt;= 12'd0;\r\n\telse\r\n\t\th_cnt &lt;= h_cnt + 12'd1;\r\nend\r\n \r\nalways@(posedge clk or posedge rst)\r\nbegin\r\n\tif(rst == 1'b1)\r\n\t\tactive_x &lt;= 12'd0;\r\n\telse if(h_cnt >= H_FP + H_SYNC + H_BP - 1)\/\/horizontal video active\r\n\t\tactive_x &lt;= h_cnt - (H_FP[11:0] + H_SYNC[11:0] + H_BP[11:0] - 12'd1);\r\n\telse\r\n\t\tactive_x &lt;= active_x;\r\nend\r\n \r\nalways@(posedge clk or posedge rst)\r\nbegin\r\n\tif(rst == 1'b1)\r\n\t\tv_cnt &lt;= 12'd0;\r\n\telse if(h_cnt == H_FP  - 1)\/\/horizontal sync time\r\n\t\tif(v_cnt == V_TOTAL - 1)\/\/vertical counter maximum value\r\n\t\t\tv_cnt &lt;= 12'd0;\r\n\t\telse\r\n\t\t\tv_cnt &lt;= v_cnt + 12'd1;\r\n\telse\r\n\t\tv_cnt &lt;= v_cnt;\r\nend\r\n \r\nalways@(posedge clk or posedge rst)\r\nbegin\r\n\tif(rst == 1'b1)\r\n\t\ths_reg &lt;= 1'b0;\r\n\telse if(h_cnt == H_FP - 1)\/\/horizontal sync begin\r\n\t\ths_reg &lt;= HS_POL;\r\n\telse if(h_cnt == H_FP + H_SYNC - 1)\/\/horizontal sync end\r\n\t\ths_reg &lt;= ~hs_reg;\r\n\telse\r\n\t\ths_reg &lt;= hs_reg;\r\nend\r\n \r\nalways@(posedge clk or posedge rst)\r\nbegin\r\n\tif(rst == 1'b1)\r\n\t\th_active &lt;= 1'b0;\r\n\telse if(h_cnt == H_FP + H_SYNC + H_BP - 1)\/\/horizontal active begin\r\n\t\th_active &lt;= 1'b1;\r\n\telse if(h_cnt == H_TOTAL - 1)\/\/horizontal active end\r\n\t\th_active &lt;= 1'b0;\r\n\telse\r\n\t\th_active &lt;= h_active;\r\nend\r\n \r\nalways@(posedge clk or posedge rst)\r\nbegin\r\n\tif(rst == 1'b1)\r\n\t\tvs_reg &lt;= 1'd0;\r\n\telse if((v_cnt == V_FP - 1) &amp;&amp; (h_cnt == H_FP - 1))\/\/vertical sync begin\r\n\t\tvs_reg &lt;= HS_POL;\r\n\telse if((v_cnt == V_FP + V_SYNC - 1) &amp;&amp; (h_cnt == H_FP - 1))\/\/vertical sync end\r\n\t\tvs_reg &lt;= ~vs_reg;  \r\n\telse\r\n\t\tvs_reg &lt;= vs_reg;\r\nend\r\n \r\nalways@(posedge clk or posedge rst)\r\nbegin\r\n\tif(rst == 1'b1)\r\n\t\tv_active &lt;= 1'd0;\r\n\telse if((v_cnt == V_FP + V_SYNC + V_BP - 1) &amp;&amp; (h_cnt == H_FP - 1))\/\/vertical active begin\r\n\t\tv_active &lt;= 1'b1;\r\n\telse if((v_cnt == V_TOTAL - 1) &amp;&amp; (h_cnt == H_FP - 1)) \/\/vertical active end\r\n\t\tv_active &lt;= 1'b0;   \r\n\telse\r\n\t\tv_active &lt;= v_active;\r\nend\r\n\r\n\r\nreg [3:0]mode=4'd0;\r\nparameter T1MS = 26'd60_000_000 ; \r\nreg [25:0]time_count;\/\/\u65f6\u949f\u8ba1\u6570\u5668\r\nalways@(posedge clk)\r\n if(time_count>=T1MS)begin\r\n     time_count&lt;=26'd0;\r\n     if(mode&lt;8)mode&lt;=mode+1'b1;\r\n     else mode&lt;=4'd0;\r\n end\r\n else time_count&lt;=time_count+1'b1;\r\n\r\n\r\n\r\n \r\nalways@(posedge clk or posedge rst)\r\nbegin\r\n\tif(rst == 1'b1)\r\n\t\tbegin\r\n\t\t\trgb_r_reg &lt;= 8'h00;\r\n\t\t\trgb_g_reg &lt;= 8'h00;\r\n\t\t\trgb_b_reg &lt;= 8'h00;\r\n\t\tend\r\n\telse if(video_active)begin\r\n\t   if(mode==0)begin\r\n\t\t  if(active_x == 12'd0)\r\n\t\t\tbegin\r\n\t\t\t\trgb_r_reg &lt;= WHITE_R;\r\n\t\t\t\trgb_g_reg &lt;= WHITE_G;\r\n\t\t\t\trgb_b_reg &lt;= WHITE_B;\r\n\t\t\tend\r\n\t\telse if(active_x == (H_ACTIVE\/8) * 1)\r\n\t\t\tbegin\r\n\t\t\t\trgb_r_reg &lt;= YELLOW_R;\r\n\t\t\t\trgb_g_reg &lt;= YELLOW_G;\r\n\t\t\t\trgb_b_reg &lt;= YELLOW_B;\r\n\t\t\tend         \r\n\t\telse if(active_x == (H_ACTIVE\/8) * 2)\r\n\t\t\tbegin\r\n\t\t\t\trgb_r_reg &lt;= CYAN_R;\r\n\t\t\t\trgb_g_reg &lt;= CYAN_G;\r\n\t\t\t\trgb_b_reg &lt;= CYAN_B;\r\n\t\t\tend\r\n\t\telse if(active_x == (H_ACTIVE\/8) * 3)\r\n\t\t\tbegin\r\n\t\t\t\trgb_r_reg &lt;= GREEN_R;\r\n\t\t\t\trgb_g_reg &lt;= GREEN_G;\r\n\t\t\t\trgb_b_reg &lt;= GREEN_B;\r\n\t\t\tend\r\n\t\telse if(active_x == (H_ACTIVE\/8) * 4)\r\n\t\t\tbegin\r\n\t\t\t\trgb_r_reg &lt;= MAGENTA_R;\r\n\t\t\t\trgb_g_reg &lt;= MAGENTA_G;\r\n\t\t\t\trgb_b_reg &lt;= MAGENTA_B;\r\n\t\t\tend\r\n\t\telse if(active_x == (H_ACTIVE\/8) * 5)\r\n\t\t\tbegin\r\n\t\t\t\trgb_r_reg &lt;= RED_R;\r\n\t\t\t\trgb_g_reg &lt;= RED_G;\r\n\t\t\t\trgb_b_reg &lt;= RED_B;\r\n\t\t\tend\r\n\t\telse if(active_x == (H_ACTIVE\/8) * 6)\r\n\t\t\tbegin\r\n\t\t\t\trgb_r_reg &lt;= BLUE_R;\r\n\t\t\t\trgb_g_reg &lt;= BLUE_G;\r\n\t\t\t\trgb_b_reg &lt;= BLUE_B;\r\n\t\t\tend \r\n\t\telse if(active_x == (H_ACTIVE\/8) * 7)\r\n\t\t\tbegin\r\n\t\t\t\trgb_r_reg &lt;= BLACK_R;\r\n\t\t\t\trgb_g_reg &lt;= BLACK_G;\r\n\t\t\t\trgb_b_reg &lt;= BLACK_B;\r\n\t\t\tend\r\n\t\telse\r\n\t\t\tbegin\r\n\t\t\t\trgb_r_reg &lt;= rgb_r_reg;\r\n\t\t\t\trgb_g_reg &lt;= rgb_g_reg;\r\n\t\t\t\trgb_b_reg &lt;= rgb_b_reg;\r\n\t\t\tend   \r\n       end\r\n       else if(mode==1)begin\r\n          \trgb_r_reg &lt;= active_x[7:0];\r\n\t\t\trgb_g_reg &lt;= 8'h00;\r\n\t\t\trgb_b_reg &lt;= 8'h00;\r\n       end\r\n       else if(mode==2)begin\r\n          \trgb_r_reg &lt;=8'h00 ;\r\n\t\t\trgb_g_reg &lt;=  active_x[7:0];\r\n\t\t\trgb_b_reg &lt;= 8'h00;\r\n       end\r\n       else if(mode==3)begin\r\n          \trgb_r_reg &lt;=8'h00 ;\r\n\t\t\trgb_g_reg &lt;=8'h00;\r\n\t\t\trgb_b_reg &lt;= active_x[7:0];\r\n       end\r\n       else if(mode==4)begin\r\n          \trgb_r_reg &lt;=active_x[7:0];\r\n\t\t\trgb_g_reg &lt;=active_x[7:0];\r\n\t\t\trgb_b_reg &lt;=active_x[7:0];\r\n       end\r\n       else if(mode==5)begin\r\n          \trgb_r_reg &lt;=8'hff;\r\n\t\t\trgb_g_reg &lt;=8'hff;\r\n\t\t\trgb_b_reg &lt;=8'hff;\r\n       end\r\n      else if(mode==6)begin\r\n          \trgb_r_reg &lt;=8'hff;\r\n\t\t\trgb_g_reg &lt;=8'h00;\r\n\t\t\trgb_b_reg &lt;=8'h00;\r\n       end\r\n       else if(mode==7)begin\r\n          \trgb_r_reg &lt;=8'h00;\r\n\t\t\trgb_g_reg &lt;=8'hff;\r\n\t\t\trgb_b_reg &lt;=8'h00;\r\n       end\r\n       else if(mode==8)begin\r\n          \trgb_r_reg &lt;=8'h00;\r\n\t\t\trgb_g_reg &lt;=8'h00;\r\n\t\t\trgb_b_reg &lt;=8'hff;\r\n       end\r\n\t\telse begin\r\n\t\t\trgb_r_reg &lt;= 8'h00;\r\n\t\t\trgb_g_reg &lt;= 8'h00;\r\n\t\t\trgb_b_reg &lt;= 8'h00;\r\n\t\tend\r\n    end\r\nend\r\n \r\nendmodule<\/pre>\n\n\n\n<p>\u5176\u4e2d \u4ee5\u4e0b\u4ee3\u7801\u7528\u6765\u6bcf\u4e24\u79d2\u949f\u5207\u6362\u4e00\u6b21\u663e\u793a\u6a21\u5f0f\uff0c\u800c\u4e0d\u540c\u7684mode \u5206\u522b\u5bf9\u5e94\u4e0a\u9762\u4ee3\u7801\u4e2d\u4e0d\u540c\u989c\u8272\u753b\u9762\u7684\u663e\u793a\u3002\u4e5f\u5c31\u662f\u7cfb\u7edf\u6bcf\u4e24\u79d2\u5207\u6362\u4e00\u6b21\u6a21\u5f0f \uff0c\u4e00\u5171\u67098\u79cd\u6a21\u5f0f<\/p>\n\n\n\n<pre class=\"wp-block-preformatted\">reg [3:0]mode=4'd0;\r\nparameter T1MS = 26'd66_000_000 ;\r\nreg [25:0]time_count;\r\nalways@(posedge clk)\r\n if(time_count>=T1MS)begin\r\n     time_count&lt;=26'd0;\r\n     if(mode&lt;8)mode&lt;=mode+1'b1;\r\n     else mode&lt;=4'd0;\r\n end\r\n else time_count&lt;=time_count+1'b1;<\/pre>\n\n\n\n<p>2\uff09\u521b\u5efa\u4e00\u4e2a\u9876\u5c42\u6a21\u5757\uff0c\u5206\u522b\u8c03\u7528\u65f6\u949f\u3001ZYNQ\u6838  \u4ee5\u53ca\u5f69\u6761\u7eb9\u663e\u793a\u6a21\u5757\uff08top.v\uff09<\/p>\n\n\n\n<pre class=\"wp-block-preformatted\">`timescale 1ns \/ 1ps\r\nmodule LCD_MODULE(\r\n    input CLK,\r\n    output [7:0]LCD_R,\r\n    output [7:0]LCD_G,\r\n    output [7:0]LCD_B,\r\n    output LCD_HSYNC,\r\n    output LCD_VSYNC,\r\n    output LCD_PCLK,\r\n    output LCD_DE, \r\n    inout  LCD_RST,\r\n    inout  LCD_I2C_SCL,\r\n    inout  LCD_I2C_SDA,\r\n    inout  BL\r\n);\r\n\r\n\r\nwire clk_33m;\r\nclk_wiz_0 u2(\r\n    .clk_in1(CLK),\r\n    .clk_out1(clk_33m)\r\n);\r\n\r\nassign LCD_PCLK=~clk_33m;\r\n\r\nCOLOR_BAR u4(\r\n    .clk(clk_33m),         \r\n    .rst(0),           \r\n    .hs(LCD_HSYNC),     \r\n    .vs(LCD_VSYNC),      \r\n    .de(LCD_DE),        \r\n    .rgb_r(LCD_R),     \r\n    .rgb_g(LCD_G),      \r\n    .rgb_b(LCD_B)     \r\n);\r\n\r\n ZYNQ_wrapper U_zynq(\r\n   .GPIO_0_0_tri_io({LCD_RST,BL}),\r\n   .IIC_0_0_scl_io(LCD_I2C_SCL),\r\n   .IIC_0_0_sda_io(LCD_I2C_SDA)\r\n );\r\n  \r\nendmodule<\/pre>\n\n\n\n<p>\u6700\u540e\u518d\u589e\u52a0\u7ea6\u675f\u6587\u4ef6 \uff08LCD_TEST.XDC\uff09<\/p>\n\n\n\n<pre class=\"wp-block-preformatted\">set_property IOSTANDARD LVCMOS33 [get_ports {LCD_R[6]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports {LCD_B[5]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports LCD_VSYNC]\r\nset_property IOSTANDARD LVCMOS33 [get_ports {LCD_R[3]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports {LCD_G[3]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports {LCD_B[0]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports {LCD_R[0]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports {LCD_G[2]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports {LCD_B[4]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports LCD_HSYNC]\r\nset_property IOSTANDARD LVCMOS33 [get_ports {LCD_R[1]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports {LCD_R[4]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports {LCD_G[1]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports {LCD_B[3]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports CLK]\r\nset_property IOSTANDARD LVCMOS33 [get_ports {LCD_G[6]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports LCD_PCLK]\r\nset_property IOSTANDARD LVCMOS33 [get_ports LCD_DE]\r\nset_property IOSTANDARD LVCMOS33 [get_ports {LCD_G[0]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports {LCD_B[2]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports {LCD_R[5]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports {LCD_G[5]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports {LCD_R[2]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports {LCD_B[1]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports LCD_RST]\r\nset_property IOSTANDARD LVCMOS33 [get_ports {LCD_G[4]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports {LCD_B[6]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports {LCD_R[7]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports LCD_I2C_SDA]\r\nset_property IOSTANDARD LVCMOS33 [get_ports LCD_I2C_SCL]\r\nset_property IOSTANDARD LVCMOS33 [get_ports {LCD_B[7]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports {LCD_G[7]}]\r\nset_property IOSTANDARD LVCMOS33 [get_ports BL]\r\n\r\nset_property PACKAGE_PIN W13 [get_ports {LCD_B[0]}]\r\nset_property PACKAGE_PIN L16 [get_ports {LCD_B[4]}]\r\nset_property PACKAGE_PIN M18 [get_ports {LCD_G[2]}]\r\nset_property PACKAGE_PIN Y19 [get_ports {LCD_R[4]}]\r\nset_property PACKAGE_PIN V17 [get_ports {LCD_R[6]}]\r\nset_property PACKAGE_PIN W16 [get_ports {LCD_R[2]}]\r\nset_property PACKAGE_PIN Y18 [get_ports {LCD_R[0]}]\r\nset_property PACKAGE_PIN V16 [get_ports {LCD_G[6]}]\r\nset_property PACKAGE_PIN Y16 [get_ports {LCD_G[0]}]\r\nset_property PACKAGE_PIN W15 [get_ports {LCD_B[6]}]\r\nset_property PACKAGE_PIN P16 [get_ports {LCD_G[1]}]\r\nset_property PACKAGE_PIN M17 [get_ports {LCD_B[1]}]\r\nset_property PACKAGE_PIN U19 [get_ports BL]\r\nset_property PACKAGE_PIN T10 [get_ports {LCD_B[3]}]\r\nset_property PACKAGE_PIN N17 [get_ports {LCD_B[5]}]\r\nset_property PACKAGE_PIN N16 [get_ports {LCD_B[7]}]\r\nset_property PACKAGE_PIN V12 [get_ports LCD_DE]\r\nset_property PACKAGE_PIN P18 [get_ports {LCD_G[3]}]\r\nset_property PACKAGE_PIN Y17 [get_ports {LCD_G[4]}]\r\nset_property PACKAGE_PIN R16 [get_ports {LCD_G[5]}]\r\nset_property PACKAGE_PIN R17 [get_ports {LCD_G[7]}]\r\nset_property PACKAGE_PIN U12 [get_ports LCD_PCLK]\r\nset_property PACKAGE_PIN K18 [get_ports CLK]\r\nset_property PACKAGE_PIN V18 [get_ports {LCD_R[1]}]\r\nset_property PACKAGE_PIN T17 [get_ports {LCD_R[3]}]\r\nset_property PACKAGE_PIN T16 [get_ports {LCD_R[5]}]\r\nset_property PACKAGE_PIN U17 [get_ports {LCD_R[7]}]\r\nset_property PACKAGE_PIN U20 [get_ports LCD_RST]\r\nset_property PACKAGE_PIN W14 [get_ports LCD_VSYNC]\r\nset_property PACKAGE_PIN Y14 [get_ports {LCD_B[2]}]\r\nset_property PACKAGE_PIN V13 [get_ports LCD_HSYNC]\r\nset_property PACKAGE_PIN U15 [get_ports LCD_I2C_SCL]\r\nset_property PACKAGE_PIN T15 [get_ports LCD_I2C_SDA]\r\n\r\nset_property CLOCK_DEDICATED_ROUTE FALSE [get_nets u2\/inst\/clk_in1_clk_wiz_0]\r\nset_property CLOCK_DEDICATED_ROUTE FALSE [get_nets CLK_IBUF]<\/pre>\n\n\n\n<h2 class=\"wp-block-heading\">4.\u751f\u6210bit\u6587\u4ef6<\/h2>\n\n\n\n<p>\u6309\u4e0b\u7eff\u8272\u7bad\u5934\u5bf9\u5de5\u7a0b\u8fdb\u884c\u7f16\u8bd1<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"115\" height=\"56\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-19.png\" alt=\"\" class=\"wp-image-206\"\/><\/figure>\n\n\n\n<p>\u6309\u4e0bGenerate Bitstream \u5b8c\u6210\u7efc\u5408\u4ee5\u53ca\u751f\u6210bit\u6587\u4ef6<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"303\" height=\"203\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-18.png\" alt=\"\" class=\"wp-image-204\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-18.png 303w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-18-300x201.png 300w\" sizes=\"auto, (max-width: 303px) 100vw, 303px\" \/><\/figure>\n\n\n\n<h2 class=\"wp-block-heading\">5.SDK\u7a0b\u5e8f\u7f16\u5199<\/h2>\n\n\n\n<p>1\uff09File\u2192Export\u2192Export hardware\u2026\uff0c\u5728\u5f39\u51fa\u7684\u5bf9\u8bdd\u6846\u4e2d\u52fe\u9009\u201cinclude bitstream\u201d\uff0c\u70b9\u51fb\u201cOK\u201d\u786e\u8ba4\uff0c\u5982\u4e0b\u56fe\u6240\u793a\u3002<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"462\" height=\"541\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-20.png\" alt=\"\" class=\"wp-image-207\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-20.png 462w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-20-256x300.png 256w\" sizes=\"auto, (max-width: 462px) 100vw, 462px\" \/><\/figure>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"332\" height=\"252\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-24.png\" alt=\"\" class=\"wp-image-211\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-24.png 332w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-24-300x228.png 300w\" sizes=\"auto, (max-width: 332px) 100vw, 332px\" \/><\/figure>\n\n\n\n<p>2\uff09File\u2192Lauch SDK\uff0c\u5728\u5f39\u51fa\u7684\u5bf9\u8bdd\u6846\u4e2d\uff0c\u4fdd\u5b58\u9ed8\u8ba4\uff0c\u70b9\u51fb\u201cOK\u201d\uff0c\u5982\u4e0b\u56fe\u6240\u793a\u3002<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"361\" height=\"285\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-21.png\" alt=\"\" class=\"wp-image-212\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-21.png 361w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-21-300x237.png 300w\" sizes=\"auto, (max-width: 361px) 100vw, 361px\" \/><\/figure>\n\n\n\n<p>\u7cfb\u7edf\u5c06\u81ea\u52a8\u6253\u5f00SDK\u5f00\u53d1\u73af\u5883<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"998\" height=\"748\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-22.png\" alt=\"\" class=\"wp-image-213\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-22.png 998w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-22-300x225.png 300w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-22-768x576.png 768w\" sizes=\"auto, (max-width: 767px) 89vw, (max-width: 1000px) 54vw, (max-width: 1071px) 543px, 580px\" \/><\/figure>\n\n\n\n<p>3\uff09\u65b0\u5efa\u4e00\u4e2a\u5de5\u7a0b file\u2192new\u2192Application Project\uff0c\u6765\u65b0\u5efa\u4e00\u4e2a\u201cApplication Project\u201d\uff0c\u5982\u4e0b\u56fe\u6240\u793a\u3002<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"624\" height=\"546\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-23.png\" alt=\"\" class=\"wp-image-214\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-23.png 624w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-23-300x263.png 300w\" sizes=\"auto, (max-width: 624px) 100vw, 624px\" \/><\/figure>\n\n\n\n<p>4\uff09\u5728\u65b0\u5efa\u5de5\u7a0b\u540d\u4e2d\u8f93\u5165\u81ea\u5df1\u7684\u5de5\u7a0b\u540d\u79f0\uff0c\u70b9\u51fbNEXT<\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"394\" height=\"151\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/11\/image-58.png\" alt=\"\" class=\"wp-image-1647\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/11\/image-58.png 394w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/11\/image-58-300x115.png 300w\" sizes=\"auto, (max-width: 394px) 100vw, 394px\" \/><\/figure>\n\n\n\n<p>5\uff09\u9009\u62e9\u7a7a\u5de5\u7a0b\uff0c\u70b9\u51fb\u5b8c\u6210FINISH<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"485\" height=\"262\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-26.png\" alt=\"\" class=\"wp-image-216\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-26.png 485w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-26-300x162.png 300w\" sizes=\"auto, (max-width: 485px) 100vw, 485px\" \/><\/figure>\n\n\n\n<p>6) \u5728\u5de5\u7a0b\u4e2d\u6dfb\u52a0main.c\u6587\u4ef6 src\u2014&gt;New\u2014&gt;Source File \u5982\u4e0b\u56fe\u6240\u793a<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"683\" height=\"497\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/10\/image-48.png\" alt=\"\" class=\"wp-image-1068\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/10\/image-48.png 683w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/10\/image-48-300x218.png 300w\" sizes=\"auto, (max-width: 683px) 100vw, 683px\" \/><\/figure>\n\n\n\n<p>7\uff09\u5728\u5f39\u51fa\u7684\u7a97\u53e3\u4e2d\u586b\u5165main.c \u5e76\u4e14\u4fdd\u5b58<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"308\" height=\"210\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/10\/image-49.png\" alt=\"\" class=\"wp-image-1069\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/10\/image-49.png 308w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/10\/image-49-300x205.png 300w\" sizes=\"auto, (max-width: 308px) 100vw, 308px\" \/><\/figure>\n\n\n\n<p>8\uff09.\u6253\u5f00\u521a\u624d\u521b\u5efa\u7684main.c<\/p>\n\n\n\n<p>\u7136\u540e \u5199\u5165\u4ee5\u4e0b\u4ee3\u7801  \u6709\u4e00\u4e2a\u5730\u65b9\u503c\u5f97\u6ce8\u610f EMIO\u7684 IO\u53e3\u7f16\u53f7 \u662f\u4ece54\u5f00\u59cb\u7684\uff0c\u4e5f\u5c31\u662f\u6211VIVADO \u4e0b\u521b\u5efa\u7684 EMIO\u7aef\u53e3\uff0c\u5728PS\u7aef\u90fd\u662f\u4ece54-55-56 \u4f9d\u6b21\u6392\u5e8f\u7684\uff08\u5c0f\u8d34\u58eb \u5c0f\u4e8e54\u7684\u662fMIO \u4e5f\u5c31\u662f\u82af\u7247PS\u7684\u786c\u4ef6IO\u53e3\uff09<\/p>\n\n\n\n<pre class=\"wp-block-preformatted\">#include \"xparameters.h\"\r\n#include \"xstatus.h\"\r\n#include \"xplatform_info.h\"\r\n#include \"xgpiops.h\"\r\n#include \"xiicps.h\"\r\n\r\n#include &lt;xil_printf.h>\r\n\r\nXGpioPs Gpio;\t\/* The driver instance for GPIO Device. *\/\r\n\r\n#define GPIO_DEVICE_ID  \tXPAR_XGPIOPS_0_DEVICE_ID\r\n\r\n#define EMIO_LCD_RST  \t55\r\n#define EMIO_LCD_BL  \t54\r\n\r\nvoid Gpio_Init(void){\r\n\tXGpioPs_Config *ConfigPtr;\r\n\r\n\tConfigPtr = XGpioPs_LookupConfig(GPIO_DEVICE_ID);\r\n\tXGpioPs_CfgInitialize(&amp;Gpio, ConfigPtr,ConfigPtr->BaseAddr);\r\n\r\n\tXGpioPs_SetDirectionPin(&amp;Gpio, EMIO_LCD_RST, 1);\r\n\tXGpioPs_SetOutputEnablePin(&amp;Gpio, EMIO_LCD_RST, 1);\r\n\tXGpioPs_WritePin(&amp;Gpio, EMIO_LCD_RST, \t1);\r\n\r\n\tXGpioPs_SetDirectionPin(&amp;Gpio, EMIO_LCD_BL, 1);\r\n\tXGpioPs_SetOutputEnablePin(&amp;Gpio, EMIO_LCD_BL, 1);\r\n\tXGpioPs_WritePin(&amp;Gpio, EMIO_LCD_BL, \t0);\r\n}\r\n\r\n\r\nvoid LCD_delay(unsigned int i){\r\n\tvolatile int Delay;\r\n\tvolatile int k;\r\n\tfor(k=0;k&lt;i;k++)\r\n\tfor (Delay = 0; Delay &lt; 10000; Delay++);\r\n}\r\n\r\n\r\n#define IIC_DEVICE_ID\t\tXPAR_XIICPS_0_DEVICE_ID\r\n#define IIC_SCLK_RATE\t\t50000\r\n#define IIC_SLAVE_ADDR\t\t0x4C  \/\/4D\r\nXIicPs Iic;\r\n\r\nunsigned char  Send_date(unsigned int date1,unsigned char date2){\r\n\tu8 state=0;\r\n\tu8 SendBuffer[4];    \/**&lt; Buffer for Transmitting Data *\/\r\n\tSendBuffer[0]=(date1>>8)&amp;0xff;\r\n\tSendBuffer[1]=date1&amp;0xff;\r\n\tSendBuffer[2]=0x00;\r\n\tSendBuffer[3]=date2;\r\n\r\n\tstate=XIicPs_MasterSendPolled(&amp;Iic, SendBuffer,4, IIC_SLAVE_ADDR);\r\n\treturn state;\r\n}\r\n\r\nvoid  Send_comm(unsigned int date1){\r\n\tu8 SendBuffer[2];    \/**&lt; Buffer for Transmitting Data *\/\r\n\tSendBuffer[0]=(date1>>8)&amp;0xff;\r\n\tSendBuffer[1]=date1&amp;0xff;\r\n\r\n\tXIicPs_MasterSendPolled(&amp;Iic, SendBuffer,2, IIC_SLAVE_ADDR);\r\n}\r\n\r\n\r\nvoid Lcd_Init(void){\r\n\tXGpioPs_WritePin(&amp;Gpio, EMIO_LCD_RST, \t1);\r\n\tLCD_delay(1000);\r\n\tXGpioPs_WritePin(&amp;Gpio, EMIO_LCD_RST, \t0);\r\n\tLCD_delay(1000);\r\n\tXGpioPs_WritePin(&amp;Gpio, EMIO_LCD_RST, \t1);\r\n\tLCD_delay(100);\r\n\r\n\tSend_date(0xF000,0x55);\r\n\tSend_date(0xF001,0xAA);\r\n\tSend_date(0xF002,0x52);\r\n\tSend_date(0xF003,0x08);\r\n\tSend_date(0xF004,0x01);\/\/Page 1\r\n\r\n\t\/\/*************AVDD Set AVDD 5.2V*************\/\/\r\n\tSend_date(0xB000,0x0D);\r\n\tSend_date(0xB001,0x0D);\r\n\tSend_date(0xB002,0x0D);\r\n\r\n\t\/\/************AVDD ratio****************\/\/\r\n\tSend_date(0xB600,0x34);\r\n\tSend_date(0xB601,0x34);\r\n\tSend_date(0xB602,0x34);\r\n\r\n\t\/\/************AVEE  -5.2V****************\/\/\r\n\tSend_date(0xB100,0x0D);\r\n\tSend_date(0xB101,0x0D);\r\n\tSend_date(0xB102,0x0D);\r\n\r\n\t\/\/***********AVEE ratio*************\/\/\r\n\tSend_date(0xB700,0x34);\r\n\tSend_date(0xB701,0x34);\r\n\tSend_date(0xB702,0x34);\r\n\r\n\t\/\/***********VCL  -2.5V*************\/\/\r\n\tSend_date(0xB200,0x00);\r\n\tSend_date(0xB201,0x00);\r\n\tSend_date(0xB202,0x00);\r\n\r\n\t\/\/**************VCL ratio*****************\/\/\r\n\tSend_date(0xB800,0x24);\r\n\tSend_date(0xB801,0x24);\r\n\tSend_date(0xB802,0x24);\r\n\r\n\r\n\t\/\/*************VGH 15V  (Free pump)*********\/\/\r\n\tSend_date(0xBF00,0x01);\r\n\tSend_date(0xB300,0x0F);\r\n\tSend_date(0xB301,0x0F);\r\n\tSend_date(0xB302,0x0F);\r\n\r\n\t\/\/*************VGH ratio*****************\/\/\r\n\tSend_date(0xB900,0x34);\r\n\tSend_date(0xB901,0x34);\r\n\tSend_date(0xB902,0x34);\r\n\r\n\t\/\/***************VGL_REG -10V**************\/\/\r\n\tSend_date(0xB500,0x08);\r\n\tSend_date(0xB501,0x08);\r\n\tSend_date(0xB502,0x08);\r\n\r\n\tSend_date(0xC200,0x03);\r\n\r\n\t\/\/*****************VGLX ratio***************\/\/\r\n\tSend_date(0xBA00,0x24);\r\n\tSend_date(0xBA01,0x24);\r\n\tSend_date(0xBA02,0x24);\r\n\r\n\t\/\/*************VGMP\/VGSP 4.5V\/0V*************\/\/\r\n\tSend_date(0xBC00,0x00);\r\n\tSend_date(0xBC01,0x78);\r\n\tSend_date(0xBC02,0x00);\r\n\r\n\t\/\/************VGMN\/VGSN -4.5V\/0V****************\/\/\r\n\tSend_date(0xBD00,0x00);\r\n\tSend_date(0xBD01,0x78);\r\n\tSend_date(0xBD02,0x00);\r\n\r\n\t\/\/************VCOM  -1.25V****************\/\/\r\n\tSend_date(0xBE00,0x00);\r\n\tSend_date(0xBE01,0x64);    \/\/67--------------\r\n\r\n\t\/\/************Gamma Setting******************\/\/\r\n\tSend_date(0xD100,0x00);\r\n\tSend_date(0xD101,0x33);\r\n\tSend_date(0xD102,0x00);\r\n\tSend_date(0xD103,0x34);\r\n\tSend_date(0xD104,0x00);\r\n\tSend_date(0xD105,0x3a);\r\n\tSend_date(0xD106,0x00);\r\n\tSend_date(0xD107,0x4A);\r\n\tSend_date(0xD108,0x00);\r\n\tSend_date(0xD109,0x5c);\r\n\tSend_date(0xD10A,0x00);\r\n\tSend_date(0xD10B,0x81);\r\n\tSend_date(0xD10C,0x00);\r\n\tSend_date(0xD10D,0xA6);\r\n\tSend_date(0xD10E,0x00);\r\n\tSend_date(0xD10F,0xE5);\r\n\tSend_date(0xD110,0x01);\r\n\tSend_date(0xD111,0x13);\r\n\tSend_date(0xD112,0x01);\r\n\tSend_date(0xD113,0x54);\r\n\tSend_date(0xD114,0x01);\r\n\tSend_date(0xD115,0x82);\r\n\tSend_date(0xD116,0x01);\r\n\tSend_date(0xD117,0xCA);\r\n\tSend_date(0xD118,0x02);\r\n\tSend_date(0xD119,0x00);\r\n\tSend_date(0xD11A,0x02);\r\n\tSend_date(0xD11B,0x01);\r\n\tSend_date(0xD11C,0x02);\r\n\tSend_date(0xD11D,0x34);\r\n\tSend_date(0xD11E,0x02);\r\n\tSend_date(0xD11F,0x67);\r\n\tSend_date(0xD120,0x02);\r\n\tSend_date(0xD121,0x84);\r\n\tSend_date(0xD122,0x02);\r\n\tSend_date(0xD123,0xA4);\r\n\tSend_date(0xD124,0x02);\r\n\tSend_date(0xD125,0xB7);\r\n\tSend_date(0xD126,0x02);\r\n\tSend_date(0xD127,0xCF);\r\n\tSend_date(0xD128,0x02);\r\n\tSend_date(0xD129,0xDE);\r\n\tSend_date(0xD12A,0x02);\r\n\tSend_date(0xD12B,0xF2);\r\n\tSend_date(0xD12C,0x02);\r\n\tSend_date(0xD12D,0xFE);\r\n\tSend_date(0xD12E,0x03);\r\n\tSend_date(0xD12F,0x10);\r\n\tSend_date(0xD130,0x03);\r\n\tSend_date(0xD131,0x33);\r\n\tSend_date(0xD132,0x03);\r\n\tSend_date(0xD133,0x6D);\r\n\r\n\tSend_date(0xD200,0x00);\r\n\tSend_date(0xD201,0x33);\r\n\tSend_date(0xD202,0x00);\r\n\tSend_date(0xD203,0x34);\r\n\tSend_date(0xD204,0x00);\r\n\tSend_date(0xD205,0x3A);\r\n\tSend_date(0xD206,0x00);\r\n\tSend_date(0xD207,0x4A);\r\n\tSend_date(0xD208,0x00);\r\n\tSend_date(0xD209,0x5C);\r\n\tSend_date(0xD20A,0x00);\r\n\tSend_date(0xD20B,0x81);\r\n\tSend_date(0xD20C,0x00);\r\n\tSend_date(0xD20D,0xA6);\r\n\tSend_date(0xD20E,0x00);\r\n\tSend_date(0xD20F,0xE5);\r\n\tSend_date(0xD210,0x01);\r\n\tSend_date(0xD211,0x13);\r\n\tSend_date(0xD212,0x01);\r\n\tSend_date(0xD213,0x54);\r\n\tSend_date(0xD214,0x01);\r\n\tSend_date(0xD215,0x82);\r\n\tSend_date(0xD216,0x01);\r\n\tSend_date(0xD217,0xCA);\r\n\tSend_date(0xD218,0x02);\r\n\tSend_date(0xD219,0x00);\r\n\tSend_date(0xD21A,0x02);\r\n\tSend_date(0xD21B,0x01);\r\n\tSend_date(0xD21C,0x02);\r\n\tSend_date(0xD21D,0x34);\r\n\tSend_date(0xD21E,0x02);\r\n\tSend_date(0xD21F,0x67);\r\n\tSend_date(0xD220,0x02);\r\n\tSend_date(0xD221,0x84);\r\n\tSend_date(0xD222,0x02);\r\n\tSend_date(0xD223,0xA4);\r\n\tSend_date(0xD224,0x02);\r\n\tSend_date(0xD225,0xB7);\r\n\tSend_date(0xD226,0x02);\r\n\tSend_date(0xD227,0xCF);\r\n\tSend_date(0xD228,0x02);\r\n\tSend_date(0xD229,0xDE);\r\n\tSend_date(0xD22A,0x02);\r\n\tSend_date(0xD22B,0xF2);\r\n\tSend_date(0xD22C,0x02);\r\n\tSend_date(0xD22D,0xFE);\r\n\tSend_date(0xD22E,0x03);\r\n\tSend_date(0xD22F,0x10);\r\n\tSend_date(0xD230,0x03);\r\n\tSend_date(0xD231,0x33);\r\n\tSend_date(0xD232,0x03);\r\n\tSend_date(0xD233,0x6D);\r\n\r\n\tSend_date(0xD300,0x00);\r\n\tSend_date(0xD301,0x33);\r\n\tSend_date(0xD302,0x00);\r\n\tSend_date(0xD303,0x34);\r\n\tSend_date(0xD304,0x00);\r\n\tSend_date(0xD305,0x3A);\r\n\tSend_date(0xD306,0x00);\r\n\tSend_date(0xD307,0x4A);\r\n\tSend_date(0xD308,0x00);\r\n\tSend_date(0xD309,0x5C);\r\n\tSend_date(0xD30A,0x00);\r\n\tSend_date(0xD30B,0x81);\r\n\tSend_date(0xD30C,0x00);\r\n\tSend_date(0xD30D,0xA6);\r\n\tSend_date(0xD30E,0x00);\r\n\tSend_date(0xD30F,0xE5);\r\n\tSend_date(0xD310,0x01);\r\n\tSend_date(0xD311,0x13);\r\n\tSend_date(0xD312,0x01);\r\n\tSend_date(0xD313,0x54);\r\n\tSend_date(0xD314,0x01);\r\n\tSend_date(0xD315,0x82);\r\n\tSend_date(0xD316,0x01);\r\n\tSend_date(0xD317,0xCA);\r\n\tSend_date(0xD318,0x02);\r\n\tSend_date(0xD319,0x00);\r\n\tSend_date(0xD31A,0x02);\r\n\tSend_date(0xD31B,0x01);\r\n\tSend_date(0xD31C,0x02);\r\n\tSend_date(0xD31D,0x34);\r\n\tSend_date(0xD31E,0x02);\r\n\tSend_date(0xD31F,0x67);\r\n\tSend_date(0xD320,0x02);\r\n\tSend_date(0xD321,0x84);\r\n\tSend_date(0xD322,0x02);\r\n\tSend_date(0xD323,0xA4);\r\n\tSend_date(0xD324,0x02);\r\n\tSend_date(0xD325,0xB7);\r\n\tSend_date(0xD326,0x02);\r\n\tSend_date(0xD327,0xCF);\r\n\tSend_date(0xD328,0x02);\r\n\tSend_date(0xD329,0xDE);\r\n\tSend_date(0xD32A,0x02);\r\n\tSend_date(0xD32B,0xF2);\r\n\tSend_date(0xD32C,0x02);\r\n\tSend_date(0xD32D,0xFE);\r\n\tSend_date(0xD32E,0x03);\r\n\tSend_date(0xD32F,0x10);\r\n\tSend_date(0xD330,0x03);\r\n\tSend_date(0xD331,0x33);\r\n\tSend_date(0xD332,0x03);\r\n\tSend_date(0xD333,0x6D);\r\n\r\n\tSend_date(0xD400,0x00);\r\n\tSend_date(0xD401,0x33);\r\n\tSend_date(0xD402,0x00);\r\n\tSend_date(0xD403,0x34);\r\n\tSend_date(0xD404,0x00);\r\n\tSend_date(0xD405,0x3A);\r\n\tSend_date(0xD406,0x00);\r\n\tSend_date(0xD407,0x4A);\r\n\tSend_date(0xD408,0x00);\r\n\tSend_date(0xD409,0x5C);\r\n\tSend_date(0xD40A,0x00);\r\n\tSend_date(0xD40B,0x81);\r\n\tSend_date(0xD40C,0x00);\r\n\tSend_date(0xD40D,0xA6);\r\n\tSend_date(0xD40E,0x00);\r\n\tSend_date(0xD40F,0xE5);\r\n\tSend_date(0xD410,0x01);\r\n\tSend_date(0xD411,0x13);\r\n\tSend_date(0xD412,0x01);\r\n\tSend_date(0xD413,0x54);\r\n\tSend_date(0xD414,0x01);\r\n\tSend_date(0xD415,0x82);\r\n\tSend_date(0xD416,0x01);\r\n\tSend_date(0xD417,0xCA);\r\n\tSend_date(0xD418,0x02);\r\n\tSend_date(0xD419,0x00);\r\n\tSend_date(0xD41A,0x02);\r\n\tSend_date(0xD41B,0x01);\r\n\tSend_date(0xD41C,0x02);\r\n\tSend_date(0xD41D,0x34);\r\n\tSend_date(0xD41E,0x02);\r\n\tSend_date(0xD41F,0x67);\r\n\tSend_date(0xD420,0x02);\r\n\tSend_date(0xD421,0x84);\r\n\tSend_date(0xD422,0x02);\r\n\tSend_date(0xD423,0xA4);\r\n\tSend_date(0xD424,0x02);\r\n\tSend_date(0xD425,0xB7);\r\n\tSend_date(0xD426,0x02);\r\n\tSend_date(0xD427,0xCF);\r\n\tSend_date(0xD428,0x02);\r\n\tSend_date(0xD429,0xDE);\r\n\tSend_date(0xD42A,0x02);\r\n\tSend_date(0xD42B,0xF2);\r\n\tSend_date(0xD42C,0x02);\r\n\tSend_date(0xD42D,0xFE);\r\n\tSend_date(0xD42E,0x03);\r\n\tSend_date(0xD42F,0x10);\r\n\tSend_date(0xD430,0x03);\r\n\tSend_date(0xD431,0x33);\r\n\tSend_date(0xD432,0x03);\r\n\tSend_date(0xD433,0x6D);\r\n\r\n\tSend_date(0xD500,0x00);\r\n\tSend_date(0xD501,0x33);\r\n\tSend_date(0xD502,0x00);\r\n\tSend_date(0xD503,0x33);\r\n\tSend_date(0xD504,0x00);\r\n\tSend_date(0xD505,0x3A);\r\n\tSend_date(0xD506,0x00);\r\n\tSend_date(0xD507,0x4A);\r\n\tSend_date(0xD508,0x00);\r\n\tSend_date(0xD509,0x5C);\r\n\tSend_date(0xD50A,0x00);\r\n\tSend_date(0xD50B,0x81);\r\n\tSend_date(0xD50C,0x00);\r\n\tSend_date(0xD50D,0xA6);\r\n\tSend_date(0xD50E,0x00);\r\n\tSend_date(0xD50F,0xE5);\r\n\tSend_date(0xD510,0x01);\r\n\tSend_date(0xD511,0x13);\r\n\tSend_date(0xD512,0x01);\r\n\tSend_date(0xD513,0x54);\r\n\tSend_date(0xD514,0x01);\r\n\tSend_date(0xD515,0x82);\r\n\tSend_date(0xD516,0x01);\r\n\tSend_date(0xD517,0xCA);\r\n\tSend_date(0xD518,0x02);\r\n\tSend_date(0xD519,0x00);\r\n\tSend_date(0xD51A,0x02);\r\n\tSend_date(0xD51B,0x01);\r\n\tSend_date(0xD51C,0x02);\r\n\tSend_date(0xD51D,0x34);\r\n\tSend_date(0xD51E,0x02);\r\n\tSend_date(0xD51F,0x67);\r\n\tSend_date(0xD520,0x02);\r\n\tSend_date(0xD521,0x84);\r\n\tSend_date(0xD522,0x02);\r\n\tSend_date(0xD523,0xA4);\r\n\tSend_date(0xD524,0x02);\r\n\tSend_date(0xD525,0xB7);\r\n\tSend_date(0xD526,0x02);\r\n\tSend_date(0xD527,0xCF);\r\n\tSend_date(0xD528,0x02);\r\n\tSend_date(0xD529,0xDE);\r\n\tSend_date(0xD52A,0x02);\r\n\tSend_date(0xD52B,0xF2);\r\n\tSend_date(0xD52C,0x02);\r\n\tSend_date(0xD52D,0xFE);\r\n\tSend_date(0xD52E,0x03);\r\n\tSend_date(0xD52F,0x10);\r\n\tSend_date(0xD530,0x03);\r\n\tSend_date(0xD531,0x33);\r\n\tSend_date(0xD532,0x03);\r\n\tSend_date(0xD533,0x6D);\r\n\r\n\tSend_date(0xD600,0x00);\r\n\tSend_date(0xD601,0x33);\r\n\tSend_date(0xD602,0x00);\r\n\tSend_date(0xD603,0x34);\r\n\tSend_date(0xD604,0x00);\r\n\tSend_date(0xD605,0x3A);\r\n\tSend_date(0xD606,0x00);\r\n\tSend_date(0xD607,0x4A);\r\n\tSend_date(0xD608,0x00);\r\n\tSend_date(0xD609,0x5C);\r\n\tSend_date(0xD60A,0x00);\r\n\tSend_date(0xD60B,0x81);\r\n\tSend_date(0xD60C,0x00);\r\n\tSend_date(0xD60D,0xA6);\r\n\tSend_date(0xD60E,0x00);\r\n\tSend_date(0xD60F,0xE5);\r\n\tSend_date(0xD610,0x01);\r\n\tSend_date(0xD611,0x13);\r\n\tSend_date(0xD612,0x01);\r\n\tSend_date(0xD613,0x54);\r\n\tSend_date(0xD614,0x01);\r\n\tSend_date(0xD615,0x82);\r\n\tSend_date(0xD616,0x01);\r\n\tSend_date(0xD617,0xCA);\r\n\tSend_date(0xD618,0x02);\r\n\tSend_date(0xD619,0x00);\r\n\tSend_date(0xD61A,0x02);\r\n\tSend_date(0xD61B,0x01);\r\n\tSend_date(0xD61C,0x02);\r\n\tSend_date(0xD61D,0x34);\r\n\tSend_date(0xD61E,0x02);\r\n\tSend_date(0xD61F,0x67);\r\n\tSend_date(0xD620,0x02);\r\n\tSend_date(0xD621,0x84);\r\n\tSend_date(0xD622,0x02);\r\n\tSend_date(0xD623,0xA4);\r\n\tSend_date(0xD624,0x02);\r\n\tSend_date(0xD625,0xB7);\r\n\tSend_date(0xD626,0x02);\r\n\tSend_date(0xD627,0xCF);\r\n\tSend_date(0xD628,0x02);\r\n\tSend_date(0xD629,0xDE);\r\n\tSend_date(0xD62A,0x02);\r\n\tSend_date(0xD62B,0xF2);\r\n\tSend_date(0xD62C,0x02);\r\n\tSend_date(0xD62D,0xFE);\r\n\tSend_date(0xD62E,0x03);\r\n\tSend_date(0xD62F,0x10);\r\n\tSend_date(0xD630,0x03);\r\n\tSend_date(0xD631,0x33);\r\n\tSend_date(0xD632,0x03);\r\n\tSend_date(0xD633,0x6D);\r\n\r\n\r\n\t\/\/**************LV2 Page 0 enable*************\/\/\r\n\tSend_date(0xF000,0x55);\r\n\tSend_date(0xF001,0xAA);\r\n\tSend_date(0xF002,0x52);\r\n\tSend_date(0xF003,0x08);\r\n\tSend_date(0xF004,0x00);\/\/Page 0\r\n\r\n\t\/\/Send_date(0xB000,0x00);\/\/add RGB mode2\r\n\t\/\/Send_date(0xB001,0x10);\r\n\t\/\/Send_date(0xB002,0x10);\r\n\t\/\/Send_date(0xB003,0x10);\r\n\t\/\/Send_date(0xB004,0x10);\r\n\tSend_date(0xB300,0x00);\r\n\r\n\t\/\/*************480x800*********************\/\/\r\n\tSend_date(0xB500,0x50);\r\n\r\n\t\/\/***************Display control**************\/\/\r\n\tSend_date(0xB100,0xCC);\r\n\tSend_date(0xB101,0x00);\r\n\r\n\t\/\/***************Source hold time*************\/\/\r\n\tSend_date(0xB600,0x05);\r\n\r\n\t\/\/**************Gate EQ control***************\/\/\r\n\tSend_date(0xB700,0x70);\r\n\tSend_date(0xB701,0x70);\r\n\r\n\t\/\/*************Source EQ control (Mode 2)******\/\/\r\n\tSend_date(0xB800,0x01);\r\n\tSend_date(0xB801,0x03);\r\n\tSend_date(0xB802,0x03);\r\n\tSend_date(0xB803,0x03);\r\n\r\n\t\/\/************Inversion mode  (2-dot)***********\/\/\r\n\tSend_date(0xBC00,0x02);\r\n\tSend_date(0xBC01,0x00);\r\n\tSend_date(0xBC02,0x00);\r\n\r\n\t\/\/***************Frame rate***************\/\/\r\n\t\/*\r\n\tSend_date(0xBD00,0x01);\r\n\tSend_date(0xBD01,0x84);\r\n\tSend_date(0xBD02,0x1C);  \/\/0X1C\r\n\tSend_date(0xBD03,0x1C);\r\n\tSend_date(0xBD04,0x00);*\/\r\n\r\n\t\/\/********Timing control 4H w\/ 4-Delayms *******\/\/\r\n\tSend_date(0xC900,0xD0);\r\n\tSend_date(0xC901,0x02);\r\n\tSend_date(0xC902,0x50);\r\n\tSend_date(0xC903,0x50);\r\n\tSend_date(0xC904,0x50);\r\n\r\n\tSend_date(0x3600,0x00);\/\/00\r\n\/\/\tSend_date(0x3600,0xe0);\/\/00\r\n\/\/\r\n\/\/\tSend_date(0x2a00,0x00);\r\n\/\/\tSend_date(0x2a01,0x00);\r\n\/\/\tSend_date(0x2a02,0x03);\r\n\/\/\tSend_date(0x2a03,0x1f);\r\n\/\/\r\n\/\/\tSend_date(0x2b00,0x00);\r\n\/\/\tSend_date(0x2b01,0x00);\r\n\/\/\tSend_date(0x2b02,0x01);\r\n\/\/\tSend_date(0x2b03,0xdf);\r\n\r\n\r\n\tSend_date(0x3500,0x00);\r\n\t\/\/Send_date(0x3A00,0x55);\r\n\tSend_date(0x3A00,0x07);\/\/RGB888\r\n\tSend_comm(0x1100);\r\n\tLCD_delay(120);\r\n\tSend_comm(0x2900);\r\n\tLCD_delay(10);\r\n\tSend_comm(0x2C00);\r\n\r\n\tXGpioPs_WritePin(&amp;Gpio, EMIO_LCD_BL, \t1);\r\n\r\n  }\r\n\r\n\r\nvoid I2C_init(){\r\n\tXIicPs_Config *Config;\r\n\tConfig = XIicPs_LookupConfig(IIC_DEVICE_ID);\r\n\tXIicPs_CfgInitialize(&amp;Iic, Config, Config->BaseAddress);\r\n\tXIicPs_SetSClk(&amp;Iic, IIC_SCLK_RATE);\r\n}\r\n\r\n\r\nint main(void)\r\n{\r\n\tGpio_Init();\r\n\tI2C_init();\r\n\tLcd_Init();\r\n\twhile(1);\r\n\r\n\treturn XST_SUCCESS;\r\n}<\/pre>\n\n\n\n<p>\u4e3b\u7a0b\u5e8f\u79cd \u53ea\u5bf9GPIO   I2C \u7684\u786c\u4ef6\u8d44\u6e90\u8fdb\u884c\u521d\u59cb\u5316\uff0c \u7136\u540e\u901a\u8fc7Lcd_Init();\u5c06\u5c4f\u5e55\u7684\u521d\u59cb\u5316\u6307\u4ee4\u901a\u8fc7I2C \u5bf9LCD\u8fdb\u884c\u914d\u7f6e\uff0c \u5b8c\u6210\u540e\u6253\u5f00\u80cc\u5149EMIO_LCD_BL<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">6.\u4e0b\u8f7d\u5230\u677f\u5b50\u4e0a\u8fdb\u884c\u9a8c\u8bc1<\/h2>\n\n\n\n<p>\u9009\u4e2d\u5de5\u7a0b\u4e2d\u7684\u786c\u4ef6\u5e73\u53f0\uff0c\u5e76\u70b9\u51fb\u53f3\u952e\u2192Program FPGA\uff0c\u5728\u5f39\u51fa\u7684\u5bf9\u8bdd\u6846\u4e2d\u9009\u62e9\u9ed8\u8ba4\uff0c\u70b9\u51fb\u201cprogram\u201d\uff0c\u5b8c\u6210FPGA PL\u90e8\u5206\u7684Program\u5de5\u4f5c<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"519\" height=\"598\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-42.png\" alt=\"\" class=\"wp-image-237\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-42.png 519w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2021\/08\/image-42-260x300.png 260w\" sizes=\"auto, (max-width: 519px) 100vw, 519px\" \/><\/figure>\n\n\n\n<p>2\uff09\u9009\u4e2d\u6211\u4eec\u751f\u6210\u7684GPIO\u5de5\u7a0b \u5c55\u5f00\u7eff\u8272\u7bad\u5934\uff08RUN\uff09\u53f3\u8fb9\u7684\u56fe\u6807\uff0c\u9009\u62e9Run As\u21921 Launch on Hardware\uff08System Debugger\uff09<\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"802\" height=\"516\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/11\/image-59.png\" alt=\"\" class=\"wp-image-1648\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/11\/image-59.png 802w, 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src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/10\/image-51.png\" alt=\"\" class=\"wp-image-1072\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/10\/image-51.png 781w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/10\/image-51-300x247.png 300w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/10\/image-51-768x633.png 768w\" sizes=\"auto, (max-width: 767px) 89vw, (max-width: 1000px) 54vw, (max-width: 1071px) 543px, 580px\" \/><\/figure>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"604\" height=\"432\" src=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/10\/image-39.png\" alt=\"\" class=\"wp-image-1052\" srcset=\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/10\/image-39.png 604w, http:\/\/www.hellofpga.com\/wp-content\/uploads\/2022\/10\/image-39-300x215.png 300w\" sizes=\"auto, (max-width: 604px) 100vw, 604px\" \/><\/figure>\n\n\n\n<p>\u4e4b\u540e\u70b9 APPLY \u7136\u540e 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aria-describedby=\"wp-block-file--media-2948057b-1d19-44e2-a5ec-dd6d3808c1b3\">\u4e0b\u8f7d<\/a><\/div>\n","protected":false},"excerpt":{"rendered":"<p>\u672c\u6587\u5bf9\u624b\u4e0a\u7684RGB888\u5c4f\u7a0b\u5e8f\u8fdb\u884c\u8c03\u8bd5\uff0c\u4e3a\u4e86\u5feb\u901f\u9a8c\u8bc1\u5c4f\u5e55\u662f\u5426\u5de5\u4f5c\uff0c\u8fd9\u91cc\u5148\u7528PS\u7684\u786c\u4ef6I2C\u529f\u80fd\u5bf9\u5c4f\u5e55\u8fdb\u884c\u521d\u59cb\u5316<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[7,13],"tags":[],"class_list":["post-1633","post","type-post","status-publish","format-standard","hentry","category-tiny-zynq","category-tiny-zynq-2"],"views":882,"_links":{"self":[{"href":"http:\/\/www.hellofpga.com\/index.php\/wp-json\/wp\/v2\/posts\/1633","targetHints":{"allow":["GET"]}}],"collection":[{"href":"http:\/\/www.hellofpga.com\/index.php\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"http:\/\/www.hellofpga.com\/index.php\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"http:\/\/www.hellofpga.com\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"http:\/\/www.hellofpga.com\/index.php\/wp-json\/wp\/v2\/comments?post=1633"}],"version-history":[{"count":9,"href":"http:\/\/www.hellofpga.com\/index.php\/wp-json\/wp\/v2\/posts\/1633\/revisions"}],"predecessor-version":[{"id":1655,"href":"http:\/\/www.hellofpga.com\/index.php\/wp-json\/wp\/v2\/posts\/1633\/revisions\/1655"}],"wp:attachment":[{"href":"http:\/\/www.hellofpga.com\/index.php\/wp-json\/wp\/v2\/media?parent=1633"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"http:\/\/www.hellofpga.com\/index.php\/wp-json\/wp\/v2\/categories?post=1633"},{"taxonomy":"post_tag","embeddable":true,"href":"http:\/\/www.hellofpga.com\/index.php\/wp-json\/wp\/v2\/tags?post=1633"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}