\u5907\u6ce8\uff1a\u672c\u6587\u4e2d\u7684\u90e8\u5206\u5185\u5bb9\u53ca\u4ee3\u7801\u4f7f\u7528\u548c\u53c2\u8003\u4e86\u6b63\u70b9\u539f\u5b50FPGA\u7684\u6559\u7a0b\uff0c\u4e5f\u5728\u6b64\u8bf4\u660e<\/strong><\/p>\n\n\n\n 26\u5e743\u67082\u65e5\u5bf9\u5185\u5bb9\u518d\u6b21\u66f4\u65b0\uff1a\u5bf9RGMII\u90e8\u5206\u589e\u52a0IDELAY\u90e8\u5206\u4ee3\u7801\uff08\u56e0XILINX 7\u7cfb\u7684FPGA IO \u4f5c\u4e3aCLK\u8f93\u5165\u65f6\uff0cIOCLK\u4f1a\u6ede\u540e\u4e8eIODATA\uff08BUFIO \u67091.2ns\u7684\u5ef6\u8fdf\uff0c\u8fd9\u662f\u901a\u8def\u51b3\u5b9a\u7684\uff0c\u548c\u903b\u8f91\u65e0\u5173\uff09\uff0c\u6240\u4ee5\u8fd9\u91cc\u9700\u8981\u989d\u5916\u52a0IDELAY\uff0c\u5bf9\u6570\u636e\u7684\u5ef6\u65f6\u8fdb\u884c\u4fee\u6b63\uff09<\/strong>\u3002<\/p>\n\n\n\n \u6709\u4eba\u4f1a\u95ee\uff0c\u539f\u672c\u786c\u4ef6PHY \u5df2\u7ecf\u5f00\u542f\u4e86\u786c\u4ef6\u76842ns delay\uff0c\u8fd9\u91cc\u4e3a\u4ec0\u4e48\u8fd8\u8981\u52a0IDELAY \uff1f\uff0c\u539f\u56e0\u662f\u539f\u672c\u7ecf\u8fc7phy\u786c\u4ef6delay 2ns\u540e\uff0c\u65f6\u949fRXC \u5df2\u7ecf\u843d\u5230\u6570\u636eRGMII DATA\u7684\u4e2d\u5fc3\u70b9\u4e86\uff0c\u4f46\u662fFPGA\u7684IO\u901a\u8def\u51b3\u5b9aIOCLK\u4f1a\u6bd4IODATA\u6ede\u540e1.2ns \uff08IOCLK \u6bd4IODATA\u901a\u8def\u4e0a\u591a\u4e86\u4e00\u4e2aBUFIO\uff09\uff0c\u5982\u679c\u4e0d\u4f5c\u4fee\u6b63\uff0c\u65f6\u949f\u91c7\u6837\u6cbf\u5c06\u4e0d\u518d\u5728\u6700\u4f73\u6570\u636e\u91c7\u6837\u70b9\u4e86\u3002<\/strong><\/p>\n\n\n\n \u6211\u4eec\u7684 Smart Artix \u548c \u6211\u4eec\u7684Smart ZYNQ \u5f00\u53d1\u677f\u4e0a\u710a\u4e86\u4e00\u9897RTL8211e \u5343\u5146\u7f51\u7edcPHY\u82af\u7247\uff0c\u5e76\u901a\u8fc7RGMII\u63a5\u53e3\u4e0eFPGA\u7684IO\u53e3\u76f8\u8fde\uff08Smart Artix \u4e3b\u677f\u63a5FPGA IO\uff0c Smart ZYNQ \u63a5\u5728PL\u7684IO \uff09\u53ef\u4e3aFPGA\u63d0\u4f9b\u7f51\u7edc\u8bbf\u95ee\u7684\u529f\u80fd\uff08\u5bf9\u4e8eZYNQ\u4e3b\u677f\u4e5f\u53ef\u4ee5\u901a\u8fc7EMIO\u65b9\u5f0f\u4f9bPS \u7535\u7528\uff09\u3002RTL8211E\u652f\u630110\/100\/1000 Mbps\u7f51\u7edc\u4f20\u8f93\u901f\u7387\u3002<\/p>\n\n\n\n RTL8211E\u662fRealtek\u745e\u6631\u63a8\u51fa\u7684\u4e00\u6b3e\u9ad8\u96c6\u6210\u7684\u7f51\u7edc\u63a5\u6536PHY\u82af\u7247\uff0c\u5b83\u7b26\u540810Base-T\uff0c100Base-TX\u548c1000Base-T IEEE802.3\u6807\u51c6\uff0c\u8be5\u82af\u7247\u5728\u7f51\u7edc\u901a\u4fe1\u4e2d\u5c5e\u4e8e\u7269\u7406\u5c42\uff0c\u7528\u4e8eMAC\u4e0ePHY\u4e4b\u95f4\u7684\u6570\u636e\u901a\u4fe1\u3002 \u5f53\u7f51\u53e3LINK\u5230\u5343\u5146\u7f51\u65f6\u901a\u8fc7RGMII \u4e0eFPGA\u8fdb\u884c\u901a\u8baf\uff0c\u53e6\u5916FPGA\u53ef\u4ee5\u901a\u8fc7MDI\/MDIO\u7ba1\u7406\u63a5\u53e3\u6765\u914d\u7f6e\u6216\u8bfb\u53d6PHY\u82af\u7247\u5185\u90e8\u7684\u5bc4\u5b58\u5668\u3002<\/p>\n\n\n\n \u82af\u7247\u5de5\u4f5c\u6846\u56fe\u5982\u4e0b\uff1a<\/strong><\/p>\n\n\n\n \u5173\u4e8e\u786c\u4ef6\u90e8\u5206\u7684\u4e00\u4e9b\u91cd\u8981\u4fe1\u606f\uff1a\uff08\u5173\u4e8eTXDLY \u548c RXDLY\uff09 <\/strong><\/p>\n\n\n\n \u786c\u4ef6\u7535\u8def\u4e0a\u5df2\u7ecf\u4f7f\u80fd\u4e86PHY\u5185\u90e8\u7684 RXDLY \u548c TXDLY \u529f\u80fd (\u53ef\u4ee5\u8ba9\u65f6\u949f\u4e0e\u6570\u636e\u7684\u4e2d\u5fc3\u5bf9\u9f50\uff0c\u4ee5\u4fdd\u8bc1\u91c7\u6837\u5230\u7684\u6570\u636e\u662f\u6b63\u786e\u7684\uff0c\u5ef6\u65f6\u653e\u5728PHY\u7aef\u4e5f\u53ef\u4ee5\u51cf\u5c11\u8f6f\u4ef6\u5f00\u53d1\u7684\u96be\u5ea6)<\/strong>\uff0c\u6240\u4ee5\u5728FPGA \u7a0b\u5e8f\u4e0a\u4e0d\u80fd\u518d\u5f00\u542f\u8f6f\u4ef6DELAY\u529f\u80fd\u3002<\/strong>\uff0816\u53ca32\u5f15\u811a\u5747\u901a\u8fc7\u4e0a\u62c9\u7535\u963b\u62c9\u9ad8\uff0c\u5373PHY\u82af\u7247\u5df2\u5f00\u542f2ns \u7684delay\uff09<\/p>\n\n\n\n \u5982\u679c\u4f60\u4e0d\u662f\u81ea\u5df1\u7f16\u5199verilog\u4ee3\u7801\u53bb\u9a71\u52a8 phy\uff0c\u800c\u662f\u4f7f\u7528vivado \u5b98\u65b9\u7684MAC IP \u5982tri_mode_ethernet_mac\u5219\u9700\u8981\u9009Include Shard Logic in example design\u5e76\u628agtx_clk90\u4fe1\u53f7 \u76f4\u63a5\u548crefclk \u76f4\u8fde\uff0c\u4e0d\u8981\u518d\u505a90\u5ea6\u76f8\u4f4d\u504f\u79fb\u4e86<\/strong><\/p>\n\n\n\n \u672c\u5b9e\u9a8c\u7684\u76ee\u6807\u662f\u5b9e\u73b0\u4e0a\u4f4d\u673a\u4e0eFPGA\u4e4b\u95f4\u7684UDP\u6570\u636e\u73af\u56de\u3002\u4e0a\u4f4d\u673a\u901a\u8fc7\u7f51\u53e3\u8c03\u8bd5\u52a9\u624b\u53d1\u9001\u6570\u636e\uff0cFPGA\u901a\u8fc7\u4ee5\u592a\u7f51\u63a5\u53e3\u63a5\u6536\u6570\u636e\uff0c\u5e76\u5c06\u5176\u56de\u4f20\u7ed9\u4e0a\u4f4d\u673a\u3002<\/p>\n\n\n\n \u867d\u7136\u672c\u5b9e\u9a8c\u4ecb\u7ecd\u7684\u662fUDP\u901a\u4fe1\uff0c\u4f46\u4fdd\u7559\u4e86ARP\u529f\u80fd\uff0c\u56e0\u4e3a\u4e0a\u4f4d\u673a\u53ea\u77e5\u9053\u76ee\u6807IP\u5730\u5740\u548c\u7aef\u53e3\u53f7\uff0c\u65e0\u6cd5\u76f4\u63a5\u83b7\u53d6\u63a5\u6536\u7aef\u7684MAC\u5730\u5740\u3002\u901a\u8fc7ARP\u534f\u8bae\u53ef\u4ee5\u81ea\u52a8\u83b7\u53d6MAC\u5730\u5740\uff0c\u907f\u514d\u4e86\u624b\u52a8\u7ed1\u5b9aMAC\u5730\u5740\u7684\u7e41\u7410\u8fc7\u7a0b\u3002<\/p>\n\n\n\n \u5b9e\u9a8c\u4e2d\uff0c\u5b9e\u73b0\u4e86ARP\u548cUDP\u534f\u8bae\u7684\u529f\u80fd\u3002FPGA\u901a\u8fc7GMII\u63a5\u53e3\u63a5\u6536\u6570\u636e\uff0c\u5e76\u6839\u636e\u534f\u8bae\u7c7b\u578b\u9009\u62e9\u4e0d\u540c\u7684\u89e3\u6790\u6a21\u5757\u3002\u63a5\u6536\u7684GMII\u6570\u636e\u5f15\u811a\u540c\u65f6\u8fde\u63a5\u81f3ARP\u548cUDP\u6a21\u5757\uff0c\u4e24\u4e2a\u6a21\u5757\u5206\u522b\u89e3\u6790\u5bf9\u5e94\u7684\u534f\u8bae\u6570\u636e\u3002\u7531\u4e8eGMII\u53d1\u9001\u4fa7\u5f15\u811a\u53ea\u80fd\u8fde\u63a5\u4e00\u4e2a\u6a21\u5757\uff0c\u4ee5\u592a\u7f51\u63a7\u5236\u6a21\u5757\u4f1a\u6839\u636e\u63a5\u6536\u5230\u7684\u6570\u636e\u534f\u8bae\u7c7b\u578b\uff0c\u52a8\u6001\u5207\u6362GMII\u53d1\u9001\u4fa7\u7684\u8fde\u63a5\uff0c\u9009\u62e9\u4e0eARP\u6216UDP\u6a21\u5757\u8fde\u63a5\u3002\u540c\u65f6\uff0c\u63a7\u5236\u6a21\u5757\u8fd8\u8d1f\u8d23\u6839\u636eARP\u63a5\u6536\u5230\u7684\u8bf7\u6c42\u7c7b\u578b\uff0c\u63a7\u5236ARP\u6a21\u5757\u8fd4\u56de\u76f8\u5e94\u7684ARP\u5e94\u7b54\u4fe1\u53f7\u3002\u4e3a\u4e86\u5e94\u5bf9\u5927\u6d41\u91cf\u6570\u636e\u7684\u63a5\u6536\uff0c\u5b9e\u9a8c\u4e2d\u4f7f\u7528\u4e86\u540c\u6b65FIFO\u6a21\u5757\u8fdb\u884c\u6570\u636e\u7f13\u5b58\uff0c\u4e14\u7531\u4e8e\u63a5\u6536\u548c\u53d1\u9001\u4f7f\u7528\u7684\u662f\u76f8\u540c\u7684\u65f6\u949f\uff0c\u91c7\u7528\u540c\u6b65FIFO\u786e\u4fdd\u6570\u636e\u4f20\u8f93\u7684\u9ad8\u6548\u6027\u548c\u7a33\u5b9a\u6027\u3002<\/p>\n\n\n\n RGMII\uff08Reduced Gigabit Media Independent Interface\uff09\u662f\u4e00\u79cd\u7528\u4e8e\u8fde\u63a5\u4ee5\u592a\u7f51\u7269\u7406\u5c42\u8bbe\u5907\uff08PHY\uff09\u548cFPGA\u6216\u5176\u4ed6\u5904\u7406\u5668\u7684\u63a5\u53e3\u6807\u51c6\u3002\u5b83\u662fGigabit Ethernet\uff08\u5343\u5146\u4ee5\u592a\u7f51\uff09\u7684\u4e00\u79cd\u5b9e\u73b0\u65b9\u5f0f\uff0c\u65e8\u5728\u7b80\u5316\u4f20\u7edfGMII\uff08Gigabit Media Independent Interface\uff09\u7684\u8bbe\u8ba1\uff0c\u540c\u65f6\u964d\u4f4e\u4fe1\u53f7\u5f15\u811a\u7684\u6570\u91cf\u3002RGMII\u4f7f\u7528\u4e86\u4fe1\u53f7\u65f6\u5e8f\u548c\u6570\u636e\u7ebf\u7684\u4f18\u5316\u8bbe\u8ba1\uff0c\u51cf\u5c11\u4e86\u63a5\u53e3\u6240\u9700\u7684\u5f15\u811a\u6570\u91cf\uff0c\u4ece\u800c\u964d\u4f4e\u4e86\u786c\u4ef6\u6210\u672c\u548c\u590d\u6742\u5ea6\u3002<\/p>\n\n\n\n RGMII \u6570\u636e\u4f4d\u5bbd\u4e3a4 \u4f4d\uff0c\u57281000Mbps \u4f20\u8f93\u901f\u7387\u4e0b\uff0c\u65f6\u949f\u9891\u7387\u4e3a125Mhz\uff0c\u5728\u65f6\u949f\u7684\u4e0a\u4e0b\u6cbf\u540c\u65f6\u91c7\u6837\u6570\u636e\u3002\u5728100Mbps \u548c10Mbps \u901a\u4fe1\u901f\u7387\u4e0b\uff0c\u4e3a\u5355\u4e2a\u65f6\u949f\u6cbf\u91c7\u6837\u3002<\/p>\n\n\n\n \u4fe1\u53f7\u7684\u8be6\u7ec6\u89e3\u91ca\uff1a<\/strong><\/p>\n\n\n\n RGMII\u63a5\u53e3\u76844\u4f4d\u6570\u636e\u4fe1\u53f7\u57281000Mbps\u901f\u7387\u4e0b\uff0cETH_TXC\u548cETH_RXC\u7684\u65f6\u949f\u9891\u7387\u4e3a125MHz\uff0c\u91c7\u7528\u53cc\u8fb9\u6cbf\u91c7\u6837\u65b9\u5f0f\uff0c\u5728\u4e0a\u5347\u6cbf\u4f20\u8f93\u6570\u636e\u7684\u4f4e4\u4f4d\uff0c\u5728\u4e0b\u964d\u6cbf\u4f20\u8f93\u6570\u636e\u7684\u9ad84\u4f4d\u3002 \u5728100Mbps\u901f\u7387\u4e0b\uff0cETH_TXC\u548cETH_RXC\u65f6\u949f\u9891\u7387\u964d\u4f4e\u4e3a25Mhz\uff0c\u5e76\u4e14\u6570\u636e\u91c7\u7528\u4e0a\u5347\u6cbf\u91c7\u6837\uff08SDR\uff09\uff0c\u5373\u6bcf\u4e2a\u5468\u671f\u4f20\u8f934\u4f4d\u6570\u636e\uff0c \u572810Mbps\u901f\u7387\u4e0b\uff0cETH_TXC\u548cETH_RXC\u7684\u65f6\u949f\u901f\u7387\u964d\u4f4e\u4e3a2.5Mhz\uff0c\u4e5f\u4e3a\u4e0a\u5347\u6cbf\u91c7\u6837\u3002<\/p>\n\n\n\n ETH_TXCTL\u548cRX_CTL \u57281000Mbps\u548c100Mbps\u4e0b\u662f\u53cc\u8fb9\u6cbf\u91c7\u6837\u7684\uff0c\u4e0a\u5347\u6cbf\u7528\u4e8e\u4f20\u8f93\u6709\u6548\u4fe1\u53f7TX_EN\/RX_DV\uff09\uff0c\u4e0b\u964d\u6cbf\u4f20\u8f93\uff08TX_ERR xor TX_EN\u3001RX_ERR xor RX_DV\uff09\u3002\u5f53RX_DV\u4e3a\u9ad8\u7535\u5e73\uff08\u8868\u793a\u6570\u636e\u6709\u6548\uff09\u4e14RX_ERR\u4e3a\u4f4e\u7535\u5e73\uff08\u8868\u793a\u6ca1\u6709\u9519\u8bef\uff09\u65f6\uff0c\u5f02\u6216\u7684\u7ed3\u679c\u4e3a\u9ad8\u7535\u5e73\uff0c\u610f\u5473\u7740\u53ea\u6709\u5f53ETH_TXCTL\u548cETH_RXCTL\u7684\u4e0a\u4e0b\u6cbf\u540c\u65f6\u4e3a\u9ad8\u7535\u5e73\u65f6\uff0c\u6570\u636e\u624d\u662f\u6709\u6548\u4e14\u6b63\u786e\u7684\u3002 \u572810Mbs\u4e0bETH_TXCTL\u548cETH_RXCTL\u63a7\u5236\u4fe1\u53f7\u6539\u4e3a\u5355\u8fb9\u6cbf\u91c7\u6837\u3002<\/p>\n\n\n\n \u4e0b\u9762\u662fRGMII\u7684\u65f6\u5e8f\u56fe\uff1a<\/strong>\uff08\u65f6\u5e8f\u56fe\u4e2d\u7684TXC\u548cRXC\u5df2\u589e\u52a0 delay\u7684\u60c5\u51b5\uff09\uff0c\u5907\u6ce8\uff0c\u5f00\u542f\u5185\u90e8PHY DELAY\u7684\u60c5\u5f62\u4e0b\uff0c \u6211\u4eecFPGA\u8f93\u51fa\u7684TXC\u4e0d\u9700\u8981\u589e\u52a0\u5ef6\u65f6\uff0cPHY\u82af\u7247\u5185\u90e8\u4f1a\u589e\u52a0\u8fd9\u90e8\u5206\u529f\u80fd\uff0cRXC\u7684\u65f6\u5019,PHY\u82af\u7247\u8f93\u51fa\u7684RXC\u4e5f\u540c\u6837\u6ede\u540e\u4e862ns\uff08\u4f46\u662fFPGA\u7684\u4ee3\u7801\u4ecd\u7136\u9700\u8981\u589e\u52a0IDELAY\uff0c\u539f\u56e0\u5728\u6587\u7ae0\u5f00\u5934\u6709\u63d0\u5230\uff09<\/strong><\/p>\n\n\n\n \u56e0\u4e3a\u6211\u4eec\u8f93\u5165\u7684\u7f51\u7edc\u6570\u636e\u662fDDR\u53cc\u8fb9\u6cbf\u91c7\u6837\u7684\uff0c\u8fd9\u91cc\u6211\u4eec\u589e\u52a0\u4e00\u4e2argmii_to_gmii\u6a21\u5757\u6765\u5b9e\u73b0DDR\u53cc\u8fb9\u6cbf\u6570\u636e \u548c SDR \u5355\u8fb9\u6cbf\u6570\u636e\u7684\u8f6c\u6362\u3002<\/p>\n\n\n\n \u56e0\u6587\u7ae0\u5f00\u59cb\u63d0\u5230\u7684\u539f\u56e0\uff0c7\u7cfbFPGA IOCLK \u4f1a\u5b58\u5728\u6ede\u540e\u60c5\u51b5\uff0c\u6240\u4ee5\u8fd9\u91cc\u9700\u8981\u989d\u5916\u589e\u52a0\u4e00\u4e2aIDELAY\u6a21\u5757\u6765\u5bf9rgmii\u7684\u6570\u636e\u5ef6\u65f6\u8fdb\u884c\u4fee\u6b63\uff08\u8ba9RXC\u91c7\u6837\u6cbf\u80fd\u843d\u5728\u6570\u636e\u7684\u4e2d\u5fc3\u4f4d\u7f6e\uff09<\/p>\n\n\n\n \u6a21\u5757\u4e3b\u8981\u5b9e\u73b0\u7684\u529f\u80fd<\/p>\n\n\n\n \u7279\u522b\u8981\u6ce8\u610f\u7684\u662f\uff0c\u8fd9\u91ccGMII \u7684TX \u548cRX \u65f6\u949f\uff0c\u4ee5\u53caRGMII\u7684TX\u65f6\u949f\u90fd\u4f7f\u7528\u4e86RGMII\u7684RX\u8f93\u5165\u65f6\u949f\u3002<\/p>\n\n\n\n (\u90e8\u5206\u56fe\u7247\u5f15\u7528\u81ea\u6b63\u70b9\u539f\u5b50\u7684\u8d44\u6599)<\/strong><\/p>\n\n\n\n \u4ee5\u592a\u7f51\u5e27\u9075\u5faa\u4e0b\u5217\u56fe\u4e2d\u7684\u683c\u5f0f<\/p>\n\n\n\n \u4ee5\u592a\u7f51\u5730\u5740\u6709\u4e09\u79cd\u7c7b\u578b\uff1a\u5355\u64ad<\/strong>\uff08Unicast\uff09\u662f\u6307\u6570\u636e\u53d1\u9001\u7ed9\u4e00\u4e2a\u7279\u5b9a\u8bbe\u5907\uff0c\u76ee\u7684MAC\u5730\u5740\u552f\u4e00\uff1b\u7ec4\u64ad<\/strong>\uff08Multicast\uff09\u662f\u6570\u636e\u53d1\u9001\u7ed9\u4e00\u7ec4\u8bbe\u5907\uff0c\u76ee\u7684MAC\u5730\u5740\u4ee5 \u5728\u901a\u8baf\u7684\u8fc7\u7a0b\u4e2d\uff0c\u8fd8\u6709\u4e00\u4e2a\u6982\u5ff5\u8981\u6ce8\u610f\uff0c\u90a3\u5c31\u662f\u4e24\u5e27\u4e4b\u95f4\u7684\u65f6\u95f4\u95f4\u9694\u5e27\u95f4\u9699\uff0c\u5e27\u95f4\u9699<\/strong>\uff08Inter-frame Gap, IFG\uff09\u662f\u6307\u4e24\u5e27\u6570\u636e\u4e4b\u95f4\u7684\u7a7a\u95f2\u65f6\u95f4\uff0c\u7528\u4e8e\u786e\u4fdd\u8bbe\u5907\u6709\u8db3\u591f\u7684\u65f6\u95f4\u5904\u7406\u5f53\u524d\u5e27\u5e76\u51c6\u5907\u63a5\u6536\u4e0b\u4e00\u5e27\uff0c\u907f\u514d\u53d1\u751f\u6570\u636e\u78b0\u649e\u6216\u5e72\u6270\u3002\u5e27\u95f4\u9699\u7684\u957f\u5ea6\u901a\u5e38\u4e3a 12 \u5b57\u8282\uff0896 \u4f4d\uff09\uff0c\u4f46\u968f\u7740\u7f51\u7edc\u901f\u7387\u7684\u63d0\u9ad8\uff0c\u7a7a\u95f2\u65f6\u95f4\u4f1a\u7f29\u77ed\uff1a\u5728 10Mbps<\/strong> \u7f51\u7edc\u4e2d\uff0c\u5e27\u95f4\u9699\u65f6\u95f4\u4e3a 9600ns<\/strong>\uff1b\u5728 100Mbps<\/strong> \u7f51\u7edc\u4e2d\uff0c\u7a7a\u95f2\u65f6\u95f4\u4e3a 960ns<\/strong>\uff1b\u800c\u5728 1000Mbps<\/strong>\uff081Gbps\uff09\u7f51\u7edc\u4e2d\uff0c\u7a7a\u95f2\u65f6\u95f4\u8fdb\u4e00\u6b65\u7f29\u77ed\u81f3 96ns<\/strong>\u3002\u5e27\u95f4\u9699\u6709\u52a9\u4e8e\u5728\u4e0d\u540c\u901f\u7387\u4e0b\u907f\u514d\u5e27\u4e4b\u95f4\u7684\u91cd\u53e0\uff0c\u4fdd\u8bc1\u6570\u636e\u4f20\u8f93\u7684\u987a\u7545\u3002<\/p>\n\n\n\n ARP\uff08\u5730\u5740\u89e3\u6790\u534f\u8bae\uff09\u7684\u4f5c\u7528\u662f\u5c06\u7f51\u7edc\u5c42\u7684IP\u5730\u5740\u6620\u5c04\u5230\u6570\u636e\u94fe\u8def\u5c42\u7684MAC\u5730\u5740\u3002\u5f53\u8bbe\u5907\u9700\u8981\u4e0e\u7f51\u7edc\u4e2d\u7684\u5176\u4ed6\u8bbe\u5907\u901a\u4fe1\u65f6\uff0c\u5b83\u901a\u8fc7ARP\u534f\u8bae\u67e5\u8be2\u76ee\u6807IP\u5730\u5740\u5bf9\u5e94\u7684\u7269\u7406\u5730\u5740\uff08MAC\u5730\u5740\uff09\u3002\u5982\u679c\u6ca1\u6709\u627e\u5230\u5bf9\u5e94\u7684MAC\u5730\u5740\uff0c\u8bbe\u5907\u4f1a\u53d1\u9001ARP\u8bf7\u6c42\u8fdb\u884c\u5e7f\u64ad\uff0c\u76ee\u6807\u8bbe\u5907\u54cd\u5e94\u540e\uff0c\u6e90\u8bbe\u5907\u5c31\u80fd\u83b7\u53d6\u5e76\u7f13\u5b58\u8be5MAC\u5730\u5740\uff0c\u786e\u4fdd\u540e\u7eed\u901a\u4fe1\u80fd\u591f\u76f4\u63a5\u4f7f\u7528\u7269\u7406\u5730\u5740\u8fdb\u884c\u6570\u636e\u4ea4\u6362\u3002<\/p>\n\n\n\n ARP\u7684\u5de5\u4f5c\u539f\u7406<\/strong>\uff1a<\/p>\n\n\n\n ARP\u534f\u8bae\u5141\u8bb8\u8bbe\u5907\u6839\u636e\u5df2\u77e5\u7684IP\u5730\u5740\u6765\u67e5\u627e\u76ee\u6807\u8bbe\u5907\u7684\u7269\u7406\u5730\u5740\uff08MAC\u5730\u5740\uff09\u3002\u5176\u5de5\u4f5c\u6d41\u7a0b\u5982\u4e0b\uff1a<\/p>\n\n\n\n \u4e0b\u56fe\u4e3a\u4ee5\u592a\u7f51\u901a\u8fc7ARP \u4f20\u8f93\u5355\u5305\u7684\u6570\u636e\u5e27\u683c\u5f0f\uff0c\u4ee5\u592a\u7f51\u7684\u6570\u636e\u5305\u5c31\u662f\u5bf9\u534f\u8bae\u7684\u5c01\u88c5\u6765\u5b9e\u73b0\u6570\u636e\u7684\u4f20\u8f93\uff0c\u5373ARP \u6570\u636e\u4f4d\u4e8e\u4ee5\u592a\u7f51\u5e27\u683c\u5f0f\u7684\u6570\u636e\u6bb5\uff08\u56fe\u4e2d\u753b\u7ea2\u7ebf\u6846\u7684\u90e8\u5206\uff09\uff08ARP\u6570\u636e\u5305\u9700\u8981\u9075\u5faa\u4ee5\u592a\u7f51\u5e27\u683c\u5f0f\uff0c\u5e76\u4e14ARP\u6570\u636e\u662f28\u4e2a\u5b57\u8282\u7684\uff0c\u6570\u636e\u6bb5\u9700\u586b\u5145\u6ee1\u81f346\u4e2a\u5b57\u8282\uff09<\/p>\n\n\n\n \u4e0b\u56fe\u662fARP\u6570\u636e\u5305\u683c\u5f0f\uff0c\u6570\u636e\u5305\u5b58\u5728\u4e8e\u4ee5\u592a\u7f51\u5e27\u7684\u6570\u636e\u6bb5\u90e8\u5206\uff1a<\/p>\n\n\n\n ARP\u7684\u4ee3\u7801\u6784\u6210\u5305\u62ec3\u4e2a\u90e8\u5206 arp arp_rx arp_tx\uff0c\u5177\u4f53\u5185\u5bb9\u5982\u4e0b\uff1a<\/strong><\/p>\n\n\n\n arp\u6a21\u5757\uff1a<\/strong>\u8d1f\u8d23\u4f8b\u5316 arp_tx arp_rx \u548ccrc\u6821\u9a8c\u4e09\u4e2a\u6a21\u5757<\/p>\n\n\n\n arp_rx.v\uff1a<\/strong><\/p>\n\n\n\n arp_rx.v\u5b9e\u73b0\u4e86\u4e00\u4e2aARP\u63a5\u6536\u6a21\u5757\uff08 arp_tx.v <\/strong>\uff1a<\/p>\n\n\n\n \u8fd9\u6bb5\u4ee3\u7801\u5b9e\u73b0\u4e86\u4e00\u4e2aARP\u5e27\u53d1\u9001\u529f\u80fd\uff0c\u8d1f\u8d23\u6784\u5efa\u548c\u53d1\u9001ARP\u8bf7\u6c42\u6216\u5e94\u7b54\u3002\u6a21\u5757\u901a\u8fc7\u72b6\u6001\u673a\u6765\u63a7\u5236\u53d1\u9001\u7684\u8fc7\u7a0b\uff0c\u4f9d\u6b21\u53d1\u9001\u524d\u5bfc\u7801\u3001\u4ee5\u592a\u7f51\u5e27\u5934\u3001ARP\u6570\u636e\u548cCRC\u6821\u9a8c\u5185\u5bb9\u3002<\/p>\n\n\n\n \u6a21\u5757\u6839\u636e\u8f93\u5165\u7684\u4f7f\u80fd\u4fe1\u53f7 arp_tx_type\u4e3a\u9ad8\u7535\u5e73\uff0c\u8868\u793a\u53d1\u9001ARP\u5e94\u7b54\u6570\u636e\u5305\u3002ARP\u5e94\u7b54\u6570\u636e\u5305\u4e2d\u7684\u76ee\u7684MAC\u5730\u5740\u548c\u76ee\u7684IP\u5730\u5740\u4eceARP\u63a5\u6536\u6570\u636e\u5305\u4e2d\u83b7\u53d6\uff08\u53ef\u52a8\u6001\u66f4\u65b0\uff09<\/p>\n\n\n\n \u53d1\u9001\u8fc7\u7a0b\u901a\u8fc7 UDP\uff08\u7528\u6237\u6570\u636e\u62a5\u534f\u8bae\uff09\u662f\u4e00\u79cd\u65e0\u8fde\u63a5\u7684\u4f20\u8f93\u5c42\u534f\u8bae\uff0c\u4e3b\u8981\u7528\u4e8e\u9700\u8981\u9ad8\u901f\u4f20\u8f93\u4f46\u5bf9\u53ef\u9760\u6027\u8981\u6c42\u8f83\u4f4e\u7684\u573a\u666f\u3002\u4e0eTCP\u4e0d\u540c\uff0cUDP\u4e0d\u5efa\u7acb\u8fde\u63a5\u3001\u4e0d\u8fdb\u884c\u6570\u636e\u91cd\u4f20\u548c\u987a\u5e8f\u63a7\u5236<\/strong>\uff0c\u56e0\u6b64\u53ef\u4ee5\u51cf\u5c11\u5ef6\u8fdf\u548c\u63d0\u9ad8\u4f20\u8f93\u6548\u7387\u3002\u5b83\u5c06\u6570\u636e\u5206\u4e3a\u72ec\u7acb\u7684\u201c\u6570\u636e\u62a5\u201d\u8fdb\u884c\u53d1\u9001\uff0c\u6bcf\u4e2a\u6570\u636e\u62a5\u5305\u542b\u5b8c\u6574\u7684\u76ee\u6807\u4fe1\u606f\uff0c\u5305\u62ec\u76ee\u6807IP\u5730\u5740\u548c\u7aef\u53e3\u53f7\u3002\u7531\u4e8e\u5176\u7b80\u5355\u7684\u534f\u8bae\u7ed3\u6784\uff0cUDP\u9002\u7528\u4e8e\u5b9e\u65f6\u6027\u8981\u6c42\u8f83\u9ad8\u7684\u5e94\u7528\uff0c\u6bd4\u5982\u89c6\u9891\u6d41\u3001\u8bed\u97f3\u901a\u4fe1\u3001\u5728\u7ebf\u6e38\u620f\u7b49\u3002<\/p>\n\n\n\n UDP\u7684\u4e3b\u8981\u7279\u70b9\u662f\u6ca1\u6709\u63e1\u624b\u8fc7\u7a0b\uff0c\u6570\u636e\u4f20\u8f93\u4e0d\u4fdd\u8bc1\u53ef\u9760\u6027\u548c\u987a\u5e8f\uff0c\u4e14\u6ca1\u6709\u6d41\u91cf\u63a7\u5236\u6216\u62e5\u585e\u63a7\u5236\u3002\u867d\u7136\u8fd9\u79cd\u8bbe\u8ba1\u4f7f\u5f97UDP\u5728\u67d0\u4e9b\u573a\u666f\u4e0b\u4f20\u8f93\u6548\u7387\u66f4\u9ad8\uff0c\u4f46\u4e5f\u610f\u5473\u7740\u5982\u679c\u6570\u636e\u5728\u4f20\u8f93\u8fc7\u7a0b\u4e2d\u4e22\u5931\u6216\u51fa\u73b0\u9519\u8bef\uff0c\u63a5\u6536\u65b9\u4e0d\u4f1a\u6536\u5230\u4efb\u4f55\u901a\u77e5\u3002\u56e0\u6b64\uff0c\u5e94\u7528\u7a0b\u5e8f\u9700\u8981\u81ea\u884c\u5904\u7406\u4e22\u5305\u548c\u9519\u8bef\u6821\u9a8c\uff0c\u901a\u5e38\u9002\u7528\u4e8e\u5bf9\u4e22\u5931\u5c11\u91cf\u6570\u636e\u4e0d\u654f\u611f\u7684\u5e94\u7528\u3002<\/p>\n\n\n\n \u4e0b\u56fe\u662fUDP \u7684\u6570\u636e\u4f20\u8f93\u5305\u683c\u5f0f\uff08\u56fe\u7247\u6765\u81ea\u6b63\u70b9\u539f\u5b50FPGA\u90e8\u5206\u8d44\u6599\uff09\uff0c\u4ece\u56fe\u4e2d\u53ef\u4ee5\u770b\u51fa UDP\u6570\u636e\u5305\u548c\u6211\u4eec\u4e4b\u524d\u7684ARP\u6570\u636e\u5305\u6709\u5f88\u591a\u76f8\u4f3c\u7684\u5730\u65b9\uff08\u90fd\u5305\u542b\u524d\u5bfc\u7801\uff0cFSD\uff0c\u4ee5\u592a\u7f51\u5e27\u5934\uff0c\u6570\u636e\u6bb5\u4ee5\u53caFCS\u6821\u9a8c\u90e8\u5206\uff09\u533a\u522b\u5728\u4e8e\u6570\u636e\u6bb5\u7684\u5185\u5bb9\u6709\u6240\u4e0d\u540c\u3002\u4ece\u56fe\u4e2d\u6211\u4eec\u8fd8\u80fd\u770b\u51fa\u4ece\u56fe\u4e2d\u53ef\u4ee5\u770b\u51fa\uff0c\u4ee5\u592a\u7f51\u7684\u6570\u636e\u5305\u5c31\u662f\u5bf9\u5404\u5c42\u534f\u8bae\u7684\u9010\u5c42\u5c01\u88c5\u6765\u5b9e\u73b0\u6570\u636e\u7684\u4f20\u8f93\u3002\u7528\u6237\u6570\u636e\u6253\u5305\u5728UDP\u534f\u8bae\u4e2d\uff0cUDP\u534f\u8bae\u53c8\u662f\u57fa\u4e8eIP\u534f\u8bae\u4e4b\u4e0a\u7684\uff0cIP\u534f\u8bae\u53c8\u662f\u8d70MAC\u5c42\u53d1\u9001\u7684\uff0c\u5373\u4ece\u5305\u542b\u5173\u7cfb\u6765\u8bf4\uff1aMAC\u5e27\u4e2d\u7684\u6570\u636e\u6bb5\u4e3aIP\u6570\u636e\u62a5\uff0cIP\u62a5\u6587\u4e2d\u7684\u6570\u636e\u6bb5\u4e3aUDP\u62a5\u6587\uff0cUDP\u62a5\u6587\u4e2d\u7684\u6570\u636e\u6bb5\u4e3a\u7528\u6237\u5e0c\u671b\u4f20\u8f93\u7684\u6570\u636e\u5185\u5bb9\u3002<\/p>\n\n\n\n \u56e0\u4e3aUDP\u534f\u8bae\u5305\u5c5e\u4e8eIP\u534f\u8bae\u5305\u7684\u4e00\u79cd\uff0c\u6240\u4ee5\u8fd9\u91cc\u6211\u4eec\u7b80\u5355\u4ecb\u7ecd\u4e0bIP\u534f\u8bae\u5305\u7684\u6570\u636e\u62a5\u90e8\u5206\u3002<\/p>\n\n\n\n IP\u6570\u636e\u5305\u4e3b\u8981\u7531\u4e24\u4e2a\u90e8\u5206\u7ec4\u6210\uff1a<\/p>\n\n\n\n IP\u5934\u90e8\u5305\u542b\u4e86\u8def\u7531\u3001\u76ee\u6807\u5730\u5740\u7b49\u4fe1\u606f\uff0c\u901a\u5e38\u5305\u62ec\u4ee5\u4e0b\u51e0\u4e2a\u5b57\u6bb5\uff1a<\/p>\n\n\n\n IP\u6570\u636e\u5305\u7684\u6570\u636e\u90e8\u5206<\/strong>\uff08\u5373IP\u7684\u8d1f\u8f7d\uff09<\/p>\n\n\n\n \u5728\u4e0d\u540c\u7684\u534f\u8bae\u60c5\u51b5\u4e0b\u4f1a\u6709\u6240\u4e0d\u540c\u3002\u5bf9\u4e8eUDP\u7684\u60c5\u51b5\uff0c\u8fd9\u4e2a\u6570\u636e\u90e8\u5206\u786e\u5b9e\u662fUDP\u6570\u636e\u5305<\/strong>\u672c\u8eab\u3002UDP\u6570\u636e\u5305\u5305\u542b\u4e86\u5b83\u81ea\u5df1\u7684\u5934\u90e8\u548c\u6570\u636e\u90e8\u5206\u3002<\/p>\n\n\n\n \u6570\u636e\u90e8\u5206<\/strong>\u53ef\u4ee5\u662f\u4efb\u4f55\u9700\u8981\u901a\u8fc7\u7f51\u7edc\u4f20\u8f93\u7684\u6570\u636e\uff08\u8fd9\u5305\u62ec\u4f46\u4e0d\u9650\u4e8eUDP\u5305\u3001TCP\u5305\u3001ICMP\u5305\u7b49\uff09<\/p>\n\n\n\n UDP\u6570\u636e\u5305\u76f8\u5bf9\u4e8eIP\u6570\u636e\u5305\u8f83\u4e3a\u7b80\u5355\uff0c\u5305\u542b\u4ee5\u4e0b\u51e0\u4e2a\u90e8\u5206\uff1a<\/p>\n\n\n\n\u4e00\u3001\u5173\u4e8e\u4e3b\u677f\u7f51\u7edc\u90e8\u5206\u7684\u786c\u4ef6\u4ecb\u7ecd\uff1a<\/strong><\/h2>\n\n\n\n
![\"\"](\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2025\/11\/image-77-1024x557.png\")
<\/figure>\n\n\n\n![\"\"](\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2025\/11\/image-78-1024x507.png\")
<\/figure>\n\n\n\n![\"\"](\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2025\/11\/image-79-1024x125.png\")
<\/figure>\n\n\n\n\u4e8c\u3001\u5b9e\u9a8c\u5185\u5bb9\uff1a<\/strong><\/h2>\n\n\n\n
\u4e09\u3001RGMII \u63a5\u53e3\u4ecb\u7ecd<\/strong><\/h2>\n\n\n\n
\n
\n
\n
\n
![\"\"](\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2025\/11\/image-82-1024x410.png\")
<\/figure>\n\n\n\n![\"\"](\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2025\/11\/image-83-1024x389.png\")
<\/figure>\n\n\n\n\u56db\u3001RGMII\u6a21\u5757\u8bbe\u8ba1<\/strong><\/h2>\n\n\n\n
`timescale 1ns \/ 1ps
module rgmii_to_gmii(
input idelay_clk,
\/\/rgmii
input rgmii_rxc,
input rgmii_rx_ctl,
input [3:0] rgmii_rxd,
output rgmii_txc,
output rgmii_tx_ctl,
output [3:0] rgmii_txd,
\/\/gmii
output gmii_rx_clk,
output gmii_rx_dv,
output [7:0] gmii_rxd,
output gmii_tx_clk,
input gmii_tx_en,
input [7:0] gmii_txd
);
wire rgmii_rxc_bufg;
wire rgmii_rxc_bufio;
wire [1:0] gmii_rxdv_t;
assign gmii_rx_clk = rgmii_rxc_bufg;
assign gmii_tx_clk = gmii_rx_clk;
assign rgmii_txc = gmii_tx_clk;
\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/RX Part\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/
BUFG BUFG_inst (
.I (rgmii_rxc),
.O (rgmii_rxc_bufg)
);
BUFIO BUFIO_inst (
.I (rgmii_rxc),
.O (rgmii_rxc_bufio)
);
parameter IDELAY_VALUE = 9;
wire [3:0] rgmii_rxd_delay;
wire rgmii_rx_ctl_delay;
IDELAYCTRL IDELAYCTRL_inst (
.RDY(),
.REFCLK(idelay_clk),
.RST(1'b0)
);
IDELAYE2 #(
.IDELAY_TYPE (\"FIXED\"),
.IDELAY_VALUE (IDELAY_VALUE),
.REFCLK_FREQUENCY(200.0)
)
u_delay_rx_ctrl (
.CNTVALUEOUT (),
.DATAOUT (rgmii_rx_ctl_delay),
.C (1'b0),
.CE (1'b0),
.CINVCTRL (1'b0),
.CNTVALUEIN (5'b0),
.DATAIN (1'b0),
.IDATAIN (rgmii_rx_ctl),
.INC (1'b0),
.LD (1'b0),
.LDPIPEEN (1'b0),
.REGRST (1'b0)
);
IDDR #(
.DDR_CLK_EDGE(\"SAME_EDGE_PIPELINED\"),
.INIT_Q1 (1'b0),
.INIT_Q2 (1'b0),
.SRTYPE (\"SYNC\")
)
u_iddr_rx_ctl (
.Q1 (gmii_rxdv_t[0]),
.Q2 (gmii_rxdv_t[1]),
.C (rgmii_rxc_bufio),
.CE (1'b1),
.D (rgmii_rx_ctl_delay),
.R (1'b0),
.S (1'b0)
);
assign gmii_rx_dv = gmii_rxdv_t[0] & gmii_rxdv_t[1];
genvar i;
generate for (i=0; i<4; i=i+1)begin
IDELAYE2 #(
.IDELAY_TYPE (\"FIXED\"),
.IDELAY_VALUE (IDELAY_VALUE),
.REFCLK_FREQUENCY(200.0)
)
u_delay_rxd (
.CNTVALUEOUT (),
.DATAOUT (rgmii_rxd_delay[i]),
.C (1'b0),
.CE (1'b0),
.CINVCTRL (1'b0),
.CNTVALUEIN (5'b0),
.DATAIN (1'b0),
.IDATAIN (rgmii_rxd[i]),
.INC (1'b0),
.LD (1'b0),
.LDPIPEEN (1'b0),
.REGRST (1'b0)
);
IDDR #(
.DDR_CLK_EDGE(\"SAME_EDGE_PIPELINED\"),
.INIT_Q1 (1'b0),
.INIT_Q2 (1'b0),
.SRTYPE (\"SYNC\")
)
u_iddr_rxd (
.Q1 (gmii_rxd[i]),
.Q2 (gmii_rxd[4+i]),
.C (rgmii_rxc_bufio),
.CE (1'b1),
.D (rgmii_rxd_delay[i]),
.R (1'b0),
.S (1'b0)
);
end
endgenerate
\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/TX Part\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/
ODDR #(
.DDR_CLK_EDGE (\"SAME_EDGE\"),
.INIT (1'b0),
.SRTYPE (\"SYNC\")
)
ODDR_inst (
.Q (rgmii_tx_ctl),
.C (gmii_tx_clk),
.CE (1'b1),
.D1 (gmii_tx_en),
.D2 (gmii_tx_en),
.R (1'b0),
.S (1'b0)
);
genvar j;
generate for (j=0; j<4; j=j+1)begin
ODDR #(
.DDR_CLK_EDGE (\"SAME_EDGE\"),
.INIT (1'b0),
.SRTYPE (\"SYNC\")
)
ODDR_inst (
.Q (rgmii_txd[j]),
.C (gmii_tx_clk),
.CE (1'b1),
.D1 (gmii_txd[j]),
.D2 (gmii_txd[4+j]),
.R (1'b0),
.S (1'b0)
);
end
endgenerate
endmodule<\/pre>\n\n\n\n\n
\u4e94\u3001\u4ee5\u592a\u7f51\u5e27\u683c\u5f0f\u4ecb\u7ecd\uff0c\u4ee5\u53caARP\u6a21\u5757\u8bbe\u8ba1<\/strong><\/h2>\n\n\n\n
\u4ee5\u592a\u7f51\u7684\u5e27\u683c\u5f0f<\/strong>\uff1a<\/h3>\n\n\n\n
![\"\"](\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2025\/12\/image-1-1024x256.png\")
<\/figure>\n\n\n\n\n
1<\/code>\u548c0<\/code>\u7ec4\u6210\uff0855-55-55-55-55-55-55\uff09\uff09\u3002\u5b83\u7684\u4f5c\u7528\u662f\u4e3a\u63a5\u6536\u65b9\u63d0\u4f9b\u4e00\u4e2a\u540c\u6b65\u4fe1\u53f7\uff0c\u5e2e\u52a9\u8bbe\u5907\u5728\u4f20\u8f93\u6570\u636e\u524d\u540c\u6b65\u65f6\u949f\uff09<\/li>\n\n\n\n10101011<\/code>\uff080xd5\uff09\u7ec4\u6210\uff0c\u6807\u5fd7\u7740\u4ee5\u592a\u7f51\u5e27\u7684\u5f00\u59cb\uff09<\/li>\n\n\n\n0x0800<\/code> \u4ee3\u8868IPv4\uff0c0x0806<\/code> \u4ee3\u8868ARP\u3002\u8fd9\u4e00\u5b57\u6bb5\u5e2e\u52a9\u63a5\u6536\u65b9\u533a\u5206\u6570\u636e\u7684\u957f\u5ea6\u548c\u534f\u8bae\u7c7b\u578b)<\/li>\n\n\n\n\n
01<\/code>\u5f00\u5934\uff0c\u6620\u5c04\u5230IP\u7ec4\u64ad\u5730\u5740\uff1b\u5e7f\u64ad<\/strong>\uff08Broadcast\uff09\u662f\u6570\u636e\u53d1\u9001\u7ed9\u7f51\u7edc\u4e2d\u6240\u6709\u8bbe\u5907\uff0c\u76ee\u7684MAC\u5730\u5740\u4e3aFF:FF:FF:FF:FF:FF<\/code>\u3002\u5355\u64ad\u7528\u4e8e\u70b9\u5bf9\u70b9\u901a\u4fe1\uff0c\u7ec4\u64ad\u7528\u4e8e\u7279\u5b9a\u7fa4\u4f53\uff0c\u5e7f\u64ad\u7528\u4e8e\u5168\u7f51\u901a\u4fe1\u3002<\/p>\n\n\n\nARP \u534f\u8bae\uff1a<\/strong><\/h2>\n\n\n\n
\n
![\"\"](\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2025\/12\/image-3-1024x293.png\")
<\/figure>\n\n\n\n![\"\"](\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2025\/12\/image-2-1024x304.png\")
<\/figure>\n\n\n\nARP\u6570\u636e\u5305\u7684\u5177\u4f53\u8bf4\u660e<\/h3>\n\n\n\n
\n
\n
0x0001<\/code>\uff0c\u800c\u5bf9\u4e8e\u5176\u4ed6\u7f51\u7edc\u7c7b\u578b\u5982FDDI\u3001\u65e0\u7ebf\u7f51\u7edc\u7b49\uff0c\u786c\u4ef6\u7c7b\u578b\u4f1a\u4e0d\u540c\u3002<\/li>\n<\/ul>\n<\/li>\n\n\n\n\n
0x0800<\/code>)\u3002\u5982\u679c\u662fIPv6\uff0c\u5219\u662f 0x86DD<\/code>\u3002<\/li>\n<\/ul>\n<\/li>\n\n\n\n\n
\n
\n
\n
\n
\n
\n
ARP\u8bf7\u6c42\u548c\u54cd\u5e94\u7684\u533a\u522b<\/h3>\n\n\n\n
\n
\/\/arp.v
module arp
#(
parameter BOARD_MAC = 48'h00_11_22_33_44_55,
parameter BOARD_IP = {8'd192,8'd168,8'd1,8'd10},
parameter DES_MAC = 48'hff_ff_ff_ff_ff_ff,
parameter DES_IP = {8'd192,8'd168,8'd1,8'd102}
)
(
input rst_n , \/\/\u590d\u4f4d\u4fe1\u53f7\uff0c\u4f4e\u7535\u5e73\u6709\u6548
\/\/GMII\u63a5\u53e3
input gmii_rx_clk, \/\/GMII\u63a5\u6536\u6570\u636e\u65f6\u949f
input gmii_rx_dv , \/\/GMII\u8f93\u5165\u6570\u636e\u6709\u6548\u4fe1\u53f7
input [7:0] gmii_rxd , \/\/GMII\u8f93\u5165\u6570\u636e
input gmii_tx_clk, \/\/GMII\u53d1\u9001\u6570\u636e\u65f6\u949f
output gmii_tx_en , \/\/GMII\u8f93\u51fa\u6570\u636e\u6709\u6548\u4fe1\u53f7
output [7:0] gmii_txd , \/\/GMII\u8f93\u51fa\u6570\u636e
\/\/\u7528\u6237\u63a5\u53e3
output arp_rx_done, \/\/ARP\u63a5\u6536\u5b8c\u6210\u4fe1\u53f7
output arp_rx_type, \/\/ARP\u63a5\u6536\u7c7b\u578b 0:\u8bf7\u6c42 1:\u5e94\u7b54
output [47:0] src_mac , \/\/\u63a5\u6536\u5230\u76ee\u7684MAC\u5730\u5740
output [31:0] src_ip , \/\/\u63a5\u6536\u5230\u76ee\u7684IP\u5730\u5740
input arp_tx_en , \/\/ARP\u53d1\u9001\u4f7f\u80fd\u4fe1\u53f7
input arp_tx_type, \/\/ARP\u53d1\u9001\u7c7b\u578b 0:\u8bf7\u6c42 1:\u5e94\u7b54
input [47:0] des_mac , \/\/\u53d1\u9001\u7684\u76ee\u6807MAC\u5730\u5740
input [31:0] des_ip , \/\/\u53d1\u9001\u7684\u76ee\u6807IP\u5730\u5740
output tx_done \/\/\u4ee5\u592a\u7f51\u53d1\u9001\u5b8c\u6210\u4fe1\u53f7
);
\/\/wire define
wire crc_en ; \/\/CRC\u5f00\u59cb\u6821\u9a8c\u4f7f\u80fd
wire crc_clr ; \/\/CRC\u6570\u636e\u590d\u4f4d\u4fe1\u53f7
wire [7:0] crc_d8 ; \/\/\u8f93\u5165\u5f85\u6821\u9a8c8\u4f4d\u6570\u636e
wire [31:0] crc_data; \/\/CRC\u6821\u9a8c\u6570\u636e
wire [31:0] crc_next; \/\/CRC\u4e0b\u6b21\u6821\u9a8c\u5b8c\u6210\u6570\u636e
\/\/*****************************************************
\/\/** main code
\/\/*****************************************************
assign crc_d8 = gmii_txd;
\/\/ARP\u63a5\u6536\u6a21\u5757
arp_rx
#(
.BOARD_MAC (BOARD_MAC), \/\/\u53c2\u6570\u4f8b\u5316
.BOARD_IP (BOARD_IP )
)
u_arp_rx(
.clk (gmii_rx_clk),
.rst_n (rst_n),
.gmii_rx_dv (gmii_rx_dv),
.gmii_rxd (gmii_rxd ),
.arp_rx_done (arp_rx_done),
.arp_rx_type (arp_rx_type),
.src_mac (src_mac ),
.src_ip (src_ip )
);
\/\/ARP\u53d1\u9001\u6a21\u5757
arp_tx
#(
.BOARD_MAC (BOARD_MAC), \/\/\u53c2\u6570\u4f8b\u5316
.BOARD_IP (BOARD_IP ),
.DES_MAC (DES_MAC ),
.DES_IP (DES_IP )
)
u_arp_tx(
.clk (gmii_tx_clk),
.rst_n (rst_n),
.arp_tx_en (arp_tx_en ),
.arp_tx_type (arp_tx_type),
.des_mac (des_mac ),
.des_ip (des_ip ),
.crc_data (crc_data ),
.crc_next (crc_next[31:24]),
.tx_done (tx_done ),
.gmii_tx_en (gmii_tx_en),
.gmii_txd (gmii_txd ),
.crc_en (crc_en ),
.crc_clr (crc_clr )
);
\/\/\u4ee5\u592a\u7f51\u53d1\u9001CRC\u6821\u9a8c\u6a21\u5757
crc32_d8 u_crc32_d8(
.clk (gmii_tx_clk),
.rst_n (rst_n ),
.data (crc_d8 ),
.crc_en (crc_en ),
.crc_clr (crc_clr ),
.crc_data (crc_data ),
.crc_next (crc_next )
);
endmodule
<\/pre>\n\n\n\narp_rx<\/code>\uff09\uff0c\u5b83\u901a\u8fc7GMII\u63a5\u53e3\u63a5\u6536\u4ee5\u592a\u7f51\u6570\u636e\u5e27\uff0c\u5e76\u89e3\u6790\u5176\u4e2d\u7684ARP\u8bf7\u6c42\u548cARP\u5e94\u7b54\u6570\u636e\u3002\u6a21\u5757\u7684\u4e3b\u8981\u529f\u80fd\u662f\u6839\u636e\u4ee5\u592a\u7f51\u5e27\u7684\u683c\u5f0f\uff0c\u9010\u6b65\u63a5\u6536\u6570\u636e\u5e76\u89e3\u6790\u8bc6\u522b\u7f51\u7edc\u5e27\u662f\u5426\u662fARP\u534f\u8bae\uff0c\u5e76\u8fdb\u4e00\u6b65\u89e3\u6790ARP\u6570\u636e\u4e2d\u7684\u64cd\u4f5c\u7801\u3001\u6e90\u548c\u76ee\u6807MAC\u5730\u5740\u3001\u6e90\u548c\u76ee\u6807IP\u5730\u5740\u3002\u5982\u679c\u63a5\u6536\u5230\u7684ARP\u8bf7\u6c42\u6216\u5e94\u7b54\u4e2d\u7684\u76ee\u6807IP\u5730\u5740\u5339\u914d\u9884\u8bbe\u7684\u677f\u5361IP\u5730\u5740\uff0c\u5219\u6a21\u5757\u4f1a\u8f93\u51fa\u76f8\u5e94\u7684\u7ed3\u679c\u3002<\/p>\n\n\n\n\/\/arp_rx.v
module arp_rx
#(
parameter BOARD_MAC = 48'h00_11_22_33_44_55,
parameter BOARD_IP = {8'd192,8'd168,8'd1,8'd10}
)
(
input clk , \/\/\u65f6\u949f\u4fe1\u53f7
input rst_n , \/\/\u590d\u4f4d\u4fe1\u53f7\uff0c\u4f4e\u7535\u5e73\u6709\u6548
input gmii_rx_dv , \/\/GMII\u8f93\u5165\u6570\u636e\u6709\u6548\u4fe1\u53f7
input [7:0] gmii_rxd , \/\/GMII\u8f93\u5165\u6570\u636e
output reg arp_rx_done, \/\/ARP\u63a5\u6536\u5b8c\u6210\u4fe1\u53f7
output reg arp_rx_type, \/\/ARP\u63a5\u6536\u7c7b\u578b 0:\u8bf7\u6c42 1:\u5e94\u7b54
output reg [47:0] src_mac , \/\/\u63a5\u6536\u5230\u7684\u6e90MAC\u5730\u5740
output reg [31:0] src_ip \/\/\u63a5\u6536\u5230\u7684\u6e90IP\u5730\u5740
);
\/\/parameter define
localparam st_idle = 5'b0_0001; \/\/\u521d\u59cb\u72b6\u6001\uff0c\u7b49\u5f85\u63a5\u6536\u524d\u5bfc\u7801
localparam st_preamble = 5'b0_0010; \/\/\u63a5\u6536\u524d\u5bfc\u7801\u72b6\u6001
localparam st_eth_head = 5'b0_0100; \/\/\u63a5\u6536\u4ee5\u592a\u7f51\u5e27\u5934
localparam st_arp_data = 5'b0_1000; \/\/\u63a5\u6536ARP\u6570\u636e
localparam st_rx_end = 5'b1_0000; \/\/\u63a5\u6536\u7ed3\u675f
localparam ETH_TPYE = 16'h0806; \/\/\u4ee5\u592a\u7f51\u5e27\u7c7b\u578b ARP
\/\/reg define
reg [4:0] cur_state ;
reg [4:0] next_state;
reg skip_en ; \/\/\u63a7\u5236\u72b6\u6001\u8df3\u8f6c\u4f7f\u80fd\u4fe1\u53f7
reg error_en ; \/\/\u89e3\u6790\u9519\u8bef\u4f7f\u80fd\u4fe1\u53f7
reg [4:0] cnt ; \/\/\u89e3\u6790\u6570\u636e\u8ba1\u6570\u5668
reg [47:0] des_mac_t ; \/\/\u63a5\u6536\u5230\u7684\u76ee\u7684MAC\u5730\u5740
reg [31:0] des_ip_t ; \/\/\u63a5\u6536\u5230\u7684\u76ee\u7684IP\u5730\u5740
reg [47:0] src_mac_t ; \/\/\u63a5\u6536\u5230\u7684\u6e90MAC\u5730\u5740
reg [31:0] src_ip_t ; \/\/\u63a5\u6536\u5230\u7684\u6e90IP\u5730\u5740
reg [15:0] eth_type ; \/\/\u4ee5\u592a\u7f51\u7c7b\u578b
reg [15:0] op_data ; \/\/\u64cd\u4f5c\u7801
reg rx_done_t ; \/\/ARP\u63a5\u6536\u5b8c\u6210\u4fe1\u53f7
\/\/*****************************************************
\/\/** main code
\/\/*****************************************************
\/\/(\u4e09\u6bb5\u5f0f\u72b6\u6001\u673a)\u540c\u6b65\u65f6\u5e8f\u63cf\u8ff0\u72b6\u6001\u8f6c\u79fb
always @(posedge clk or negedge rst_n) begin
if(!rst_n)
cur_state <= st_idle;
else
cur_state <= next_state;
end
\/\/\u7ec4\u5408\u903b\u8f91\u5224\u65ad\u72b6\u6001\u8f6c\u79fb\u6761\u4ef6
always @(*) begin
next_state = st_idle;
case(cur_state)
st_idle : begin \/\/\u7b49\u5f85\u63a5\u6536\u524d\u5bfc\u7801
if(skip_en)
next_state = st_preamble;
else
next_state = st_idle;
end
st_preamble : begin \/\/\u63a5\u6536\u524d\u5bfc\u7801
if(skip_en)
next_state = st_eth_head;
else if(error_en)
next_state = st_rx_end;
else
next_state = st_preamble;
end
st_eth_head : begin \/\/\u63a5\u6536\u4ee5\u592a\u7f51\u5e27\u5934
if(skip_en)
next_state = st_arp_data;
else if(error_en)
next_state = st_rx_end;
else
next_state = st_eth_head;
end
st_arp_data : begin \/\/\u63a5\u6536ARP\u6570\u636e
if(skip_en)
next_state = st_rx_end;
else if(error_en)
next_state = st_rx_end;
else
next_state = st_arp_data;
end
st_rx_end : begin \/\/\u63a5\u6536\u7ed3\u675f
if(skip_en)
next_state = st_idle;
else
next_state = st_rx_end;
end
default : next_state = st_idle;
endcase
end
\/\/\u65f6\u5e8f\u7535\u8def\u63cf\u8ff0\u72b6\u6001\u8f93\u51fa,\u89e3\u6790\u4ee5\u592a\u7f51\u6570\u636e
always @(posedge clk or negedge rst_n) begin
if(!rst_n) begin
skip_en <= 1'b0;
error_en <= 1'b0;
cnt <= 5'd0;
des_mac_t <= 48'd0;
des_ip_t <= 32'd0;
src_mac_t <= 48'd0;
src_ip_t <= 32'd0;
eth_type <= 16'd0;
op_data <= 16'd0;
rx_done_t <= 1'b0;
arp_rx_type <= 1'b0;
src_mac <= 48'd0;
src_ip <= 32'd0;
end
else begin
skip_en <= 1'b0;
error_en <= 1'b0;
rx_done_t <= 1'b0;
case(next_state)
st_idle : begin \/\/\u68c0\u6d4b\u5230\u7b2c\u4e00\u4e2a8'h55
if((gmii_rx_dv == 1'b1) && (gmii_rxd == 8'h55))
skip_en <= 1'b1;
end
st_preamble : begin
if(gmii_rx_dv) begin \/\/\u89e3\u6790\u524d\u5bfc\u7801
cnt <= cnt + 5'd1;
if((cnt < 5'd6) && (gmii_rxd != 8'h55)) \/\/7\u4e2a8'h55
error_en <= 1'b1;
else if(cnt==5'd6) begin
cnt <= 5'd0;
if(gmii_rxd==8'hd5) \/\/1\u4e2a8'hd5
skip_en <= 1'b1;
else
error_en <= 1'b1;
end
end
end
st_eth_head : begin
if(gmii_rx_dv) begin
cnt <= cnt + 5'b1;
if(cnt < 5'd6)
des_mac_t <= {des_mac_t[39:0],gmii_rxd};
else if(cnt == 5'd6) begin
\/\/\u5224\u65adMAC\u5730\u5740\u662f\u5426\u4e3a\u5f00\u53d1\u677fMAC\u5730\u5740\u6216\u8005\u516c\u5171\u5730\u5740
if((des_mac_t != BOARD_MAC)
&& (des_mac_t != 48'hff_ff_ff_ff_ff_ff))
error_en <= 1'b1;
end
else if(cnt == 5'd12)
eth_type[15:8] <= gmii_rxd; \/\/\u4ee5\u592a\u7f51\u534f\u8bae\u7c7b\u578b
else if(cnt == 5'd13) begin
eth_type[7:0] <= gmii_rxd;
cnt <= 5'd0;
if(eth_type[15:8] == ETH_TPYE[15:8] \/\/\u5224\u65ad\u662f\u5426\u4e3aARP\u534f\u8bae
&& gmii_rxd == ETH_TPYE[7:0])
skip_en <= 1'b1;
else
error_en <= 1'b1;
end
end
end
st_arp_data : begin
if(gmii_rx_dv) begin
cnt <= cnt + 5'd1;
if(cnt == 5'd6)
op_data[15:8] <= gmii_rxd; \/\/\u64cd\u4f5c\u7801
else if(cnt == 5'd7)
op_data[7:0] <= gmii_rxd;
else if(cnt >= 5'd8 && cnt < 5'd14) \/\/\u6e90MAC\u5730\u5740
src_mac_t <= {src_mac_t[39:0],gmii_rxd};
else if(cnt >= 5'd14 && cnt < 5'd18) \/\/\u6e90IP\u5730\u5740
src_ip_t<= {src_ip_t[23:0],gmii_rxd};
else if(cnt >= 5'd24 && cnt < 5'd28) \/\/\u76ee\u6807IP\u5730\u5740
des_ip_t <= {des_ip_t[23:0],gmii_rxd};
else if(cnt == 5'd28) begin
cnt <= 5'd0;
if(des_ip_t == BOARD_IP) begin \/\/\u5224\u65ad\u76ee\u7684IP\u5730\u5740\u548c\u64cd\u4f5c\u7801
if((op_data == 16'd1) || (op_data == 16'd2)) begin
skip_en <= 1'b1;
rx_done_t <= 1'b1;
src_mac <= src_mac_t;
src_ip <= src_ip_t;
src_mac_t <= 48'd0;
src_ip_t <= 32'd0;
des_mac_t <= 48'd0;
des_ip_t <= 32'd0;
if(op_data == 16'd1)
arp_rx_type <= 1'b0; \/\/ARP\u8bf7\u6c42
else
arp_rx_type <= 1'b1; \/\/ARP\u5e94\u7b54
end
else
error_en <= 1'b1;
end
else
error_en <= 1'b1;
end
end
end
st_rx_end : begin
cnt <= 5'd0;
\/\/\u5355\u5305\u6570\u636e\u63a5\u6536\u5b8c\u6210
if(gmii_rx_dv == 1'b0 && skip_en == 1'b0)
skip_en <= 1'b1;
end
default : ;
endcase
end
end
\/\/\u8f93\u51faarp_rx_done\u4fe1\u53f7
always @(posedge clk or negedge rst_n) begin
if(!rst_n)
arp_rx_done <= 1'b0;
else
arp_rx_done <= rx_done_t;
end
endmodule
<\/pre>\n\n\n\narp_tx_en<\/code> \u542f\u52a8\u53d1\u9001\uff0c\u5e76\u901a\u8fc7\u72b6\u6001\u673a\u7ba1\u7406\u4e0d\u540c\u9636\u6bb5\u7684\u6570\u636e\u4f20\u8f93\u3002<\/p>\n\n\n\ngmii_tx_en<\/code> \u548c gmii_txd<\/code> \u63a7\u5236\uff0c\u6700\u540e\u901a\u8fc7 tx_done<\/code> \u8f93\u51fa\u53d1\u9001\u5b8c\u6210\u4fe1\u53f7\u3002<\/p>\n\n\n\n\/\/arp_tx.v
module arp_tx
#(
parameter BOARD_MAC = 48'h00_11_22_33_44_55,
parameter BOARD_IP = {8'd192,8'd168,8'd1,8'd10},
parameter DES_MAC = 48'hff_ff_ff_ff_ff_ff,
parameter DES_IP = {8'd192,8'd168,8'd1,8'd102}
)
(
input clk , \/\/\u65f6\u949f\u4fe1\u53f7
input rst_n , \/\/\u590d\u4f4d\u4fe1\u53f7\uff0c\u4f4e\u7535\u5e73\u6709\u6548
input arp_tx_en , \/\/ARP\u53d1\u9001\u4f7f\u80fd\u4fe1\u53f7
input arp_tx_type, \/\/ARP\u53d1\u9001\u7c7b\u578b 0:\u8bf7\u6c42 1:\u5e94\u7b54
input [47:0] des_mac , \/\/\u53d1\u9001\u7684\u76ee\u6807MAC\u5730\u5740
input [31:0] des_ip , \/\/\u53d1\u9001\u7684\u76ee\u6807IP\u5730\u5740
input [31:0] crc_data , \/\/CRC\u6821\u9a8c\u6570\u636e
input [7:0] crc_next , \/\/CRC\u4e0b\u6b21\u6821\u9a8c\u5b8c\u6210\u6570\u636e
output reg tx_done , \/\/\u4ee5\u592a\u7f51\u53d1\u9001\u5b8c\u6210\u4fe1\u53f7
output reg gmii_tx_en , \/\/GMII\u8f93\u51fa\u6570\u636e\u6709\u6548\u4fe1\u53f7
output reg [7:0] gmii_txd , \/\/GMII\u8f93\u51fa\u6570\u636e
output reg crc_en , \/\/CRC\u5f00\u59cb\u6821\u9a8c\u4f7f\u80fd
output reg crc_clr \/\/CRC\u6570\u636e\u590d\u4f4d\u4fe1\u53f7
);
localparam st_idle = 5'b0_0001; \/\/\u521d\u59cb\u72b6\u6001\uff0c\u7b49\u5f85\u5f00\u59cb\u53d1\u9001\u4fe1\u53f7
localparam st_preamble = 5'b0_0010; \/\/\u53d1\u9001\u524d\u5bfc\u7801+\u5e27\u8d77\u59cb\u754c\u5b9a\u7b26
localparam st_eth_head = 5'b0_0100; \/\/\u53d1\u9001\u4ee5\u592a\u7f51\u5e27\u5934
localparam st_arp_data = 5'b0_1000; \/\/
localparam st_crc = 5'b1_0000; \/\/\u53d1\u9001CRC\u6821\u9a8c\u503c
localparam ETH_TYPE = 16'h0806 ; \/\/\u4ee5\u592a\u7f51\u5e27\u7c7b\u578b ARP\u534f\u8bae
localparam HD_TYPE = 16'h0001 ; \/\/\u786c\u4ef6\u7c7b\u578b \u4ee5\u592a\u7f51
localparam PROTOCOL_TYPE= 16'h0800 ; \/\/\u4e0a\u5c42\u534f\u8bae\u4e3aIP\u534f\u8bae
\/\/\u4ee5\u592a\u7f51\u6570\u636e\u6700\u5c0f\u4e3a46\u4e2a\u5b57\u8282,\u4e0d\u8db3\u90e8\u5206\u586b\u5145\u6570\u636e
localparam MIN_DATA_NUM = 16'd46 ;
\/\/reg define
reg [4:0] cur_state ;
reg [4:0] next_state ;
reg [7:0] preamble[7:0] ; \/\/\u524d\u5bfc\u7801+SFD
reg [7:0] eth_head[13:0]; \/\/\u4ee5\u592a\u7f51\u9996\u90e8
reg [7:0] arp_data[27:0]; \/\/ARP\u6570\u636e
reg tx_en_d0 ; \/\/arp_tx_en\u4fe1\u53f7\u5ef6\u65f6
reg tx_en_d1 ;
reg skip_en ; \/\/\u63a7\u5236\u72b6\u6001\u8df3\u8f6c\u4f7f\u80fd\u4fe1\u53f7
reg [5:0] cnt ;
reg [4:0] data_cnt ; \/\/\u53d1\u9001\u6570\u636e\u4e2a\u6570\u8ba1\u6570\u5668
reg tx_done_t ;
\/\/wire define
wire pos_tx_en ; \/\/arp_tx_en\u4fe1\u53f7\u4e0a\u5347\u6cbf
\/\/*****************************************************
\/\/** main code
\/\/*****************************************************
assign pos_tx_en = (~tx_en_d1) & tx_en_d0;
\/\/\u5bf9arp_tx_en\u4fe1\u53f7\u5ef6\u65f6\u6253\u62cd\u4e24\u6b21,\u7528\u4e8e\u91c7arp_tx_en\u7684\u4e0a\u5347\u6cbf
always @(posedge clk or negedge rst_n) begin
if(!rst_n) begin
tx_en_d0 <= 1'b0;
tx_en_d1 <= 1'b0;
end
else begin
tx_en_d0 <= arp_tx_en;
tx_en_d1 <= tx_en_d0;
end
end
\/\/(\u4e09\u6bb5\u5f0f\u72b6\u6001\u673a)\u540c\u6b65\u65f6\u5e8f\u63cf\u8ff0\u72b6\u6001\u8f6c\u79fb
always @(posedge clk or negedge rst_n) begin
if(!rst_n)
cur_state <= st_idle;
else
cur_state <= next_state;
end
\/\/\u7ec4\u5408\u903b\u8f91\u5224\u65ad\u72b6\u6001\u8f6c\u79fb\u6761\u4ef6
always @(*) begin
next_state = st_idle;
case(cur_state)
st_idle : begin \/\/\u7a7a\u95f2\u72b6\u6001
if(skip_en)
next_state = st_preamble;
else
next_state = st_idle;
end
st_preamble : begin \/\/\u53d1\u9001\u524d\u5bfc\u7801+\u5e27\u8d77\u59cb\u754c\u5b9a\u7b26
if(skip_en)
next_state = st_eth_head;
else
next_state = st_preamble;
end
st_eth_head : begin \/\/\u53d1\u9001\u4ee5\u592a\u7f51\u9996\u90e8
if(skip_en)
next_state = st_arp_data;
else
next_state = st_eth_head;
end
st_arp_data : begin \/\/\u53d1\u9001ARP\u6570\u636e
if(skip_en)
next_state = st_crc;
else
next_state = st_arp_data;
end
st_crc: begin \/\/\u53d1\u9001CRC\u6821\u9a8c\u503c
if(skip_en)
next_state = st_idle;
else
next_state = st_crc;
end
default : next_state = st_idle;
endcase
end
\/\/\u65f6\u5e8f\u7535\u8def\u63cf\u8ff0\u72b6\u6001\u8f93\u51fa\uff0c\u53d1\u9001\u4ee5\u592a\u7f51\u6570\u636e
always @(posedge clk or negedge rst_n) begin
if(!rst_n) begin
skip_en <= 1'b0;
cnt <= 6'd0;
data_cnt <= 5'd0;
crc_en <= 1'b0;
gmii_tx_en <= 1'b0;
gmii_txd <= 8'd0;
tx_done_t <= 1'b0;
\/\/\u521d\u59cb\u5316\u6570\u7ec4
\/\/\u524d\u5bfc\u7801 7\u4e2a8'h55 + 1\u4e2a8'hd5
preamble[0] <= 8'h55;
preamble[1] <= 8'h55;
preamble[2] <= 8'h55;
preamble[3] <= 8'h55;
preamble[4] <= 8'h55;
preamble[5] <= 8'h55;
preamble[6] <= 8'h55;
preamble[7] <= 8'hd5;
\/\/\u4ee5\u592a\u7f51\u5e27\u5934
eth_head[0] <= DES_MAC[47:40]; \/\/\u76ee\u7684MAC\u5730\u5740
eth_head[1] <= DES_MAC[39:32];
eth_head[2] <= DES_MAC[31:24];
eth_head[3] <= DES_MAC[23:16];
eth_head[4] <= DES_MAC[15:8];
eth_head[5] <= DES_MAC[7:0];
eth_head[6] <= BOARD_MAC[47:40]; \/\/\u6e90MAC\u5730\u5740
eth_head[7] <= BOARD_MAC[39:32];
eth_head[8] <= BOARD_MAC[31:24];
eth_head[9] <= BOARD_MAC[23:16];
eth_head[10] <= BOARD_MAC[15:8];
eth_head[11] <= BOARD_MAC[7:0];
eth_head[12] <= ETH_TYPE[15:8]; \/\/\u4ee5\u592a\u7f51\u5e27\u7c7b\u578b
eth_head[13] <= ETH_TYPE[7:0];
\/\/ARP\u6570\u636e
arp_data[0] <= HD_TYPE[15:8]; \/\/\u786c\u4ef6\u7c7b\u578b
arp_data[1] <= HD_TYPE[7:0];
arp_data[2] <= PROTOCOL_TYPE[15:8]; \/\/\u4e0a\u5c42\u534f\u8bae\u7c7b\u578b
arp_data[3] <= PROTOCOL_TYPE[7:0];
arp_data[4] <= 8'h06; \/\/\u786c\u4ef6\u5730\u5740\u957f\u5ea6,6
arp_data[5] <= 8'h04; \/\/\u534f\u8bae\u5730\u5740\u957f\u5ea6,4
arp_data[6] <= 8'h00; \/\/OP,\u64cd\u4f5c\u7801 8'h01\uff1aARP\u8bf7\u6c42 8'h02:ARP\u5e94\u7b54
arp_data[7] <= 8'h01;
arp_data[8] <= BOARD_MAC[47:40]; \/\/\u53d1\u9001\u7aef(\u6e90)MAC\u5730\u5740
arp_data[9] <= BOARD_MAC[39:32];
arp_data[10] <= BOARD_MAC[31:24];
arp_data[11] <= BOARD_MAC[23:16];
arp_data[12] <= BOARD_MAC[15:8];
arp_data[13] <= BOARD_MAC[7:0];
arp_data[14] <= BOARD_IP[31:24]; \/\/\u53d1\u9001\u7aef(\u6e90)IP\u5730\u5740
arp_data[15] <= BOARD_IP[23:16];
arp_data[16] <= BOARD_IP[15:8];
arp_data[17] <= BOARD_IP[7:0];
arp_data[18] <= DES_MAC[47:40]; \/\/\u63a5\u6536\u7aef(\u76ee\u7684)MAC\u5730\u5740
arp_data[19] <= DES_MAC[39:32];
arp_data[20] <= DES_MAC[31:24];
arp_data[21] <= DES_MAC[23:16];
arp_data[22] <= DES_MAC[15:8];
arp_data[23] <= DES_MAC[7:0];
arp_data[24] <= DES_IP[31:24]; \/\/\u63a5\u6536\u7aef(\u76ee\u7684)IP\u5730\u5740
arp_data[25] <= DES_IP[23:16];
arp_data[26] <= DES_IP[15:8];
arp_data[27] <= DES_IP[7:0];
end
else begin
skip_en <= 1'b0;
crc_en <= 1'b0;
gmii_tx_en <= 1'b0;
tx_done_t <= 1'b0;
case(next_state)
st_idle : begin
if(pos_tx_en) begin
skip_en <= 1'b1;
\/\/\u5982\u679c\u76ee\u6807MAC\u5730\u5740\u548cIP\u5730\u5740\u5df2\u7ecf\u66f4\u65b0,\u5219\u53d1\u9001\u6b63\u786e\u7684\u5730\u5740
if((des_mac != 48'b0) || (des_ip != 32'd0)) begin
eth_head[0] <= des_mac[47:40];
eth_head[1] <= des_mac[39:32];
eth_head[2] <= des_mac[31:24];
eth_head[3] <= des_mac[23:16];
eth_head[4] <= des_mac[15:8];
eth_head[5] <= des_mac[7:0];
arp_data[18] <= des_mac[47:40];
arp_data[19] <= des_mac[39:32];
arp_data[20] <= des_mac[31:24];
arp_data[21] <= des_mac[23:16];
arp_data[22] <= des_mac[15:8];
arp_data[23] <= des_mac[7:0];
arp_data[24] <= des_ip[31:24];
arp_data[25] <= des_ip[23:16];
arp_data[26] <= des_ip[15:8];
arp_data[27] <= des_ip[7:0];
end
if(arp_tx_type == 1'b0)
arp_data[7] <= 8'h01; \/\/ARP\u8bf7\u6c42
else
arp_data[7] <= 8'h02; \/\/ARP\u5e94\u7b54
end
end
st_preamble : begin \/\/\u53d1\u9001\u524d\u5bfc\u7801+\u5e27\u8d77\u59cb\u754c\u5b9a\u7b26
gmii_tx_en <= 1'b1;
gmii_txd <= preamble[cnt];
if(cnt == 6'd7) begin
skip_en <= 1'b1;
cnt <= 1'b0;
end
else
cnt <= cnt + 1'b1;
end
st_eth_head : begin \/\/\u53d1\u9001\u4ee5\u592a\u7f51\u9996\u90e8
gmii_tx_en <= 1'b1;
crc_en <= 1'b1;
gmii_txd <= eth_head[cnt];
if (cnt == 6'd13) begin
skip_en <= 1'b1;
cnt <= 1'b0;
end
else
cnt <= cnt + 1'b1;
end
st_arp_data : begin \/\/\u53d1\u9001ARP\u6570\u636e
crc_en <= 1'b1;
gmii_tx_en <= 1'b1;
\/\/\u81f3\u5c11\u53d1\u900146\u4e2a\u5b57\u8282
if (cnt == MIN_DATA_NUM - 1'b1) begin
skip_en <= 1'b1;
cnt <= 1'b0;
data_cnt <= 1'b0;
end
else
cnt <= cnt + 1'b1;
if(data_cnt <= 6'd27) begin
data_cnt <= data_cnt + 1'b1;
gmii_txd <= arp_data[data_cnt];
end
else
gmii_txd <= 8'd0; \/\/Padding,\u586b\u51450
end
st_crc : begin \/\/\u53d1\u9001CRC\u6821\u9a8c\u503c
gmii_tx_en <= 1'b1;
cnt <= cnt + 1'b1;
if(cnt == 6'd0)
gmii_txd <= {~crc_next[0], ~crc_next[1], ~crc_next[2],~crc_next[3],
~crc_next[4], ~crc_next[5], ~crc_next[6],~crc_next[7]};
else if(cnt == 6'd1)
gmii_txd <= {~crc_data[16], ~crc_data[17], ~crc_data[18],
~crc_data[19], ~crc_data[20], ~crc_data[21],
~crc_data[22],~crc_data[23]};
else if(cnt == 6'd2) begin
gmii_txd <= {~crc_data[8], ~crc_data[9], ~crc_data[10],
~crc_data[11],~crc_data[12], ~crc_data[13],
~crc_data[14],~crc_data[15]};
end
else if(cnt == 6'd3) begin
gmii_txd <= {~crc_data[0], ~crc_data[1], ~crc_data[2],~crc_data[3],
~crc_data[4], ~crc_data[5], ~crc_data[6],~crc_data[7]};
tx_done_t <= 1'b1;
skip_en <= 1'b1;
cnt <= 1'b0;
end
end
default :;
endcase
end
end
\/\/\u53d1\u9001\u5b8c\u6210\u4fe1\u53f7\u53cacrc\u503c\u590d\u4f4d\u4fe1\u53f7
always @(posedge clk or negedge rst_n) begin
if(!rst_n) begin
tx_done <= 1'b0;
crc_clr <= 1'b0;
end
else begin
tx_done <= tx_done_t;
crc_clr <= tx_done_t;
end
end
endmodule<\/pre>\n\n\n\n\u516d\u3001UDP\u6a21\u5757\u8bbe\u8ba1<\/strong><\/h2>\n\n\n\n
![\"\"](\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2025\/12\/image-4-1024x443.png\")
<\/figure>\n\n\n\n![\"\"](\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2025\/12\/image-5-1024x420.png\")
<\/figure>\n\n\n\nIP\u6570\u636e\u5305\u7684\u7ed3\u6784<\/strong><\/h3>\n\n\n\n
\n
IP\u5934\u90e8\u7ed3\u6784<\/strong><\/h4>\n\n\n\n
\u5b57\u6bb5<\/th> \u957f\u5ea6<\/th> \u63cf\u8ff0<\/th><\/tr><\/thead> \u7248\u672c\uff08Version\uff09<\/strong><\/td> 4 bits<\/td> IP\u534f\u8bae\u7684\u7248\u672c\uff0cIPv4\u4e3a4\uff0cIPv6\u4e3a6<\/td><\/tr> \u9996\u90e8\u957f\u5ea6\uff08IHL\uff09<\/strong><\/td> 4 bits<\/td> IP\u9996\u90e8\u7684\u957f\u5ea6\uff0c\u5355\u4f4d\u662f32\u4f4d\uff084\u5b57\u8282\uff09\uff0c\u5373\u6709\u591a\u5c11\u4e2a32\u4f4d\uff0c\u56e0\u4e3a\u9996\u90e8\u957f\u5ea6\u662f4bits\u7684\u53730-15\uff0c\u6240\u4ee5\u9996\u90e8\u6700\u592716×4=64\u5b57\u8282<\/td><\/tr> \u670d\u52a1\u7c7b\u578b\uff08Type of Service\uff09<\/strong><\/td> 8 bits<\/td> \u63a7\u5236\u670d\u52a1\u8d28\u91cf\u7684\u5b57\u6bb5\uff0c\u5728\u65e7\u6807\u51c6\u4e2d\u53eb\u505a\u670d\u52a1\u7c7b\u578b\uff08\u73b0\u5728\u57fa\u672c\u4e0d\u9002\u7528\uff09<\/strong><\/td><\/tr> \u603b\u957f\u5ea6\uff08Total Length\uff09<\/strong><\/td> 16 bits<\/td> \u5305\u62ec\u9996\u90e8\u548c\u6570\u636e\u7684\u603b\u957f\u5ea6\uff08\u5355\u4f4d\u662f\u5b57\u8282\uff09\u536016bits \u56e0\u6b64\u6570\u636e\u62a5\u7684\u6700\u5927\u957f\u5ea6\u4e3a 65535 \u5b57\u8282.\u603b\u957f\u5ea6\u5fc5\u987b\u4e0d\u8d85\u8fc7\u6700\u5927\u4f20\u9001\u5355\u5143 MTU<\/td><\/tr> \u6807\u8bc6\u7b26\uff08Identification\uff09<\/strong><\/td> 16 bits<\/td> \u6570\u636e\u5305\u7684\u6807\u8bc6\u7b26\uff0c\u5b83\u662f\u4e00\u4e2a\u8ba1\u6570\u5668,\u7528\u6765\u4ea7\u751f\u6570\u636e\u62a5\u7684\u6807\u8bc6<\/td><\/tr> \u6807\u5fd7\uff08Flags\uff09<\/strong><\/td> 3 bits<\/td> \u5206\u7247\u63a7\u5236\u6807\u5fd7\uff0c3\u4f4d\u6807\u5fd7\uff08Flags\uff09\u5b57\u6bb5\uff0c\u7b2c1\u4f4d\u4e3a\u4fdd\u7559\u4f4d\uff1b\u7b2c2\u4f4d\u8868\u793a\u7981\u6b62\u5206\u7247\uff081\u8868\u793a\u4e0d\u5206\u7247 0\uff1a\u5141\u8bb8\u5206\u7247\uff09\uff1b\u7b2c3\u4f4d\u6807\u8bc6\u66f4\u591a\u5206\u7247\uff08\u9664\u4e86\u6570\u636e\u62a5\u7684\u6700\u540e\u4e00\u4e2a\u5206\u7247\u5916\uff0c\u5176\u5b83\u5206\u7247\u90fd\u4e3a1\uff09<\/td><\/tr> \u7247\u504f\u79fb\uff08Fragment Offset\uff09<\/strong><\/td> 13 bits<\/td> \u6570\u636e\u5305\u5206\u7247\u7684\u4f4d\u7f6e\u504f\u79fb\uff0c\u5728\u63a5\u6536\u65b9\u8fdb\u884c\u6570\u636e\u62a5\u91cd\u7ec4\u65f6\u7528\u6765\u6807\u8bc6\u5206\u7247\u7684\u987a\u5e8f<\/td><\/tr> \u751f\u5b58\u65f6\u95f4\uff08TTL\uff09<\/strong><\/td> 8 bits<\/td> \u6570\u636e\u62a5\u5728\u7f51\u7edc\u4e2d\u53ef\u901a\u8fc7\u7684\u8def\u7531\u5668\u6570\u7684\u6700\u5927\u503c<\/td><\/tr> \u534f\u8bae\uff08Protocol\uff09<\/strong><\/td> 8 bits<\/td> \u4e0a\u5c42\u534f\u8bae\uff081\u8868\u793a\u4e3a ICMP \u534f\u8bae, 2\u8868\u793a\u4e3a IGMP \u534f\u8bae, 6\u8868\u793a\u4e3a TCP \u534f\u8bae, 17\u8868\u793a\u4e3a UDP \u534f\u8bae\uff09<\/td><\/tr> \u5934\u90e8\u6821\u9a8c\u548c\uff08Header Checksum\uff09<\/strong><\/td> 16 bits<\/td> \u6821\u9a8c\u548c\uff0c\u7528\u4e8e\u68c0\u67e5\u5934\u90e8\u9519\u8bef\uff08\u4e0d\u5305\u542b\u6570\u636e\u90e8\u5206\uff09<\/td><\/tr> \u6e90IP\u5730\u5740\uff08Source Address\uff09<\/strong><\/td> 32 bits<\/td> \u53d1\u9001\u7aef\u7684IP\u5730\u5740<\/td><\/tr> \u76ee\u6807IP\u5730\u5740\uff08Destination Address\uff09<\/strong><\/td> 32 bits<\/td> \u63a5\u6536\u7aef\u7684IP\u5730\u5740<\/td><\/tr> \u9009\u9879\uff08Options\uff09<\/strong><\/td> \u53ef\u53d8\u957f\u5ea6<\/td> \u53ef\u9009\u5b57\u6bb5\uff0c\u901a\u5e38\u4e0d\u5e38\u7528<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n UDP\u6570\u636e\u5305\u7684\u7ed3\u6784<\/strong><\/h3>\n\n\n\n
![\"\"](\"http:\/\/www.hellofpga.com\/wp-content\/uploads\/2025\/12\/image-6-1024x323.png\")
<\/figure>\n\n\n\n\u5b57\u6bb5<\/th> \u957f\u5ea6<\/th> \u63cf\u8ff0<\/th><\/tr><\/thead>